用因果Transformer预测逻辑综合优化结果,提升电路设计效率。
Logic Synthesis Optimization with Predictive Self-Supervision via Causal Transformers
- 基于自回归Transformer和预测性自监督学习,融合电路图与优化序列信息。
- 在三个数据集上实现5.74%~17.06%的QoR预测性能提升。
- 适合关注AI驱动EDA、电路优化的工程师与研究者。
现代硬件设计依赖高层逻辑门抽象,简化逻辑电路实现。逻辑综合优化(LSO)是电子设计自动化(EDA)流程中的一环,旨在通过优化提升电路布局的性能指标,如面积和速度。近年来,机器学习(ML)在EDA中的应用日益广泛,尤其体现在基于策略的强化学习(RL)方法指导的逻辑综合优化。然而,现有模型面临过拟合和泛化能力弱的问题,主要源于公开电路数据有限及图编码器表达能力不足。为应对这些挑战并缓解数据稀缺问题,本文提出LSOformer,一种利用自回归Transformer和预测性自监督学习(SSL)来预测质量结果(QoR)轨迹的新方法。LSOformer引入交叉注意力模块,融合电路图与优化序列的特征,显著提升QoR预测精度。实验表明,在归纳设置下,该方法在EPFL、OABCD和专有电路数据集上的QoR预测性能分别提升5.74%、4.35%和17.06%,优于基线架构。
原文摘要 · Abstract (English)
Contemporary hardware design benefits from the abstraction provided by high-level logic gates, streamlining the implementation of logic circuits. Logic Synthesis Optimization (LSO) operates at one level of abstraction within the Electronic Design Automation (EDA) workflow, targeting improvements in logic circuits with respect to performance metrics such as size and speed in the final layout. Recent trends in the field show a growing interest in leveraging Machine Learning (ML) for EDA, notably through ML-guided logic synthesis utilizing policy-based Reinforcement Learning (RL) methods.Despite these advancements, existing models face challenges such as overfitting and limited generalization, attributed to constrained public circuits and the expressiveness limitations of graph encoders. To address these hurdles, and tackle data scarcity issues, we introduce LSOformer, a novel approach harnessing Autoregressive transformer models and predictive SSL to predict the trajectory of Quality of Results (QoR). LSOformer integrates cross-attention modules to merge insights from circuit graphs and optimization sequences, thereby enhancing prediction accuracy for QoR metrics. Experimental studies validate the effectiveness of LSOformer, showcasing its superior performance over baseline architectures in QoR prediction tasks, where it achieves improvements of 5.74%, 4.35%, and 17.06% on the EPFL, OABCD, and proprietary circuits datasets, respectively, in inductive setup.
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