用可微逻辑门构建卷积网络，推理速度更快且模型更小。
Convolutional Differentiable Logic Gate Networks
- 引入卷积逻辑门树与逻辑或池化，提升网络规模与表达能力。
- CIFAR-10上仅用6100万逻辑门达到86.29%准确率，比当前最优小29倍。
- 适合追求高效推理的边缘设备部署场景。
随着机器学习模型推理成本上升，对快速高效的模型需求日益增长。近期有研究提出通过可微松弛直接学习逻辑门网络，其推理仅需硬件原生支持的逻辑门操作（如NAND、OR、XOR），效率更高。本文在此基础上，引入深度逻辑门树卷积、逻辑或池化和残差初始化，使逻辑门网络规模提升一个数量级以上，并具备卷积范式。在CIFAR-10上，仅使用6100万逻辑门即实现86.29%的准确率，优于当前最优方法，同时模型尺寸缩小29倍。
原文摘要 · Abstract (English)
With the increasing inference cost of machine learning models, there is a growing interest in models with fast and efficient inference. Recently, an approach for learning logic gate networks directly via a differentiable relaxation was proposed. Logic gate networks are faster than conventional neural network approaches because their inference only requires logic gate operators such as NAND, OR, and XOR, which are the underlying building blocks of current hardware and can be efficiently executed. We build on this idea, extending it by deep logic gate tree convolutions, logical OR pooling, and residual initializations. This allows scaling logic gate networks up by over one order of magnitude and utilizing the paradigm of convolution. On CIFAR-10, we achieve an accuracy of 86.29% using only 61 million logic gates, which improves over the SOTA while being 29x smaller.
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