构建知识图谱数据集,让大模型自动设计模拟电路。
AMSnet-KG: A Netlist Dataset for LLM-based AMS Circuit Auto-Design Using Knowledge Graph RAG
- 用知识图谱整合电路功能与性能信息,指导大模型生成设计。
- 基于规格自动生成电路拓扑,通过贝叶斯优化确定管尺寸。
- 适合芯片自动化设计研究者,尤其关注模拟电路生成的团队。
高性能模拟与混合信号(AMS)电路主要采用全定制设计,耗时且依赖经验,自动化难度大。大语言模型(LLM)在电子设计自动化(EDA)中展现出潜力,但缺乏高质量数据导致模型幻觉,影响设计可靠性。本文提出 AMSnet-KG,一个包含多种AMS电路原理图与网表的数据集,并构建带有功能与性能标注的知识图谱。基于此,我们提出自动化电路生成框架:根据需求规格制定设计策略,检索匹配元件并组装拓扑,通过贝叶斯优化获得晶体管尺寸;仿真结果反馈给LLM以迭代优化拓扑,确保满足设计指标。通过运算放大器和比较器案例验证,实现从规格到网表的低人工干预自动设计流程。论文所用数据集将在发表后开源。
原文摘要 · Abstract (English)
High-performance analog and mixed-signal (AMS) circuits are mainly full-custom designed, which is time-consuming and labor-intensive. A significant portion of the effort is experience-driven, which makes the automation of AMS circuit design a formidable challenge. Large language models (LLMs) have emerged as powerful tools for Electronic Design Automation (EDA) applications, fostering advancements in the automatic design process for large-scale AMS circuits. However, the absence of high-quality datasets has led to issues such as model hallucination, which undermines the robustness of automatically generated circuit designs. To address this issue, this paper introduces AMSnet-KG, a dataset encompassing various AMS circuit schematics and netlists. We construct a knowledge graph with annotations on detailed functional and performance characteristics. Facilitated by AMSnet-KG, we propose an automated AMS circuit generation framework that utilizes the comprehensive knowledge embedded in LLMs. We first formulate a design strategy (e.g., circuit architecture using a number of circuit components) based on required specifications. Next, matched circuit components are retrieved and assembled into a complete topology, and transistor sizing is obtained through Bayesian optimization. Simulation results of the netlist are fed back to the LLM for further topology refinement, ensuring the circuit design specifications are met. We perform case studies of operational amplifier and comparator design to verify the automatic design flow from specifications to netlists with minimal human effort. The dataset used in this paper will be open-sourced upon publishing of this paper.
Thank you to arXiv for use of its open access interoperability. PaperDance 不是 arXiv 官方产品;中文卡片由大模型生成,请以原文为准。