用强化学习生成电路图，高效设计逻辑门。
GraCo -- A Graph Composer for Integrated Circuits
- 通过强化学习逐步构建电路图，再转为网表与SPICE仿真。
- 设计反相器少5倍采样步骤，NAND2门快2.5倍。
- 支持先验知识注入，提升采样效率，适合电路自动化设计。
集成电路设计复杂度高，从定制数字单元到模拟电路均具挑战。尽管过去数十年有大量研究致力于构建通用自动化框架，但计算高效的AI解决方案仍有探索空间。本文提出图构架方法GraCo，基于强化学习合成集成电路。GraCo逐步学习构建电路图，随后转化为网表并用SPICE仿真。该方法高度可配置，可融入先验设计知识。我们形式化了其利用方式，并证明一致性检查能显著提升采样效率。在评估中，与随机基线对比，GraCo在生成标准单元如反相器和两输入与非门（NAND2）时表现更优：设计反相器所需采样步骤减少5倍，成功合成的NAND2门速度提升2.5倍。
原文摘要 · Abstract (English)
Designing integrated circuits involves substantial complexity, posing challenges in revealing its potential applications - from custom digital cells to analog circuits. Despite extensive research over the past decades in building versatile and automated frameworks, there remains open room to explore more computationally efficient AI-based solutions. This paper introduces the graph composer GraCo, a novel method for synthesizing integrated circuits using reinforcement learning (RL). GraCo learns to construct a graph step-by-step, which is then converted into a netlist and simulated with SPICE. We demonstrate that GraCo is highly configurable, enabling the incorporation of prior design knowledge into the framework. We formalize how this prior knowledge can be utilized and, in particular, show that applying consistency checks enhances the efficiency of the sampling process. To evaluate its performance, we compare GraCo to a random baseline, which is known to perform well for smaller design space problems. We demonstrate that GraCo can discover circuits for tasks such as generating standard cells, including the inverter and the two-input NAND (NAND2) gate. Compared to a random baseline, GraCo requires 5x fewer sampling steps to design an inverter and successfully synthesizes a NAND2 gate that is 2.5x faster.
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