用UVM验证硬件数学算法，高效发现早期设计缺陷
Hard Math -- Easy UVM: Pragmatic solutions for verifying hardware algorithms using UVM
- 结合预设数据场景与可测性设计，实施已知答案测试
- 在雷达传感器芯片项目中成功定位并隔离概念与设计错误
- 适合硬件算法验证工程师快速上手实战方案
本文提出针对硬件中复杂数学算法的实用验证方法，通过基于预设数据场景和设计可测性模式的已知答案测试策略，实现高效、有效的验证。该方法在多种应用场景的单芯片雷达传感器项目中得到实际验证，验证环境基于SystemVerilog和通用验证方法学（UVM）。实践表明，该方法能早期发现并隔离概念性及设计性错误，显著提升验证效率与覆盖率。
原文摘要 · Abstract (English)
This paper presents pragmatic solutions for verifying complex mathematical algorithms implemented in hardware in an efficient and effective manner. Maximizing leverage of a known-answer-test strategy, based on predefined data scenarios combined with design-for-verification modes, we demonstrate how to find and isolate concept and design bugs early in the flow. The solutions presented are based on real project experience with single chip radar sensors for a variety of applications. The verification environments supporting the presented strategies are based on SystemVerilog and the Universal Verification Methodology.
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