用测地线融合技术,让芯片大模型更懂指令、更专业。
ChipAlign: Instruction Alignment in Large Language Models for Chip Design via Geodesic Interpolation
- 通过测地线插值融合通用指令模型与芯片专用模型权重
- 在IFEval上指令遵循能力提升26.6%,芯片任务性能相当
- 适合需要精准理解指令的芯片设计工程师使用
大语言模型在芯片设计领域应用日益广泛,如ChipNeMo等专用模型已出现。然而,这些模型普遍存在指令对齐能力不足的问题,难以有效执行人类明确指令,限制了其作为硬件设计助手的实际应用。本文提出ChipAlign,一种无需训练的模型融合方法,通过考虑权重空间中的流形结构,采用测地线插值融合通用指令对齐模型与芯片专用模型的权重,生成兼具强指令遵循能力和芯片专业知识的融合模型。实验表明,ChipAlign显著提升了现有芯片大模型的指令遵循能力,在IFEval基准上最高提升26.6%,同时保持了相当的芯片领域性能。该改进也带来显著的问答任务增益:OpenROAD QA任务提升3.9%,生产级芯片QA任务提升8.25%,超越现有最优基线。
原文摘要 · Abstract (English)
Recent advancements in large language models (LLMs) have expanded their application across various domains, including chip design, where domain-adapted chip models like ChipNeMo have emerged. However, these models often struggle with instruction alignment, a crucial capability for LLMs that involves following explicit human directives. This limitation impedes the practical application of chip LLMs, including serving as assistant chatbots for hardware design engineers. In this work, we introduce ChipAlign, a novel approach that utilizes a training-free model merging strategy, combining the strengths of a general instruction-aligned LLM with a chip-specific LLM. By considering the underlying manifold in the weight space, ChipAlign employs geodesic interpolation to effectively fuse the weights of input LLMs, producing a merged model that inherits strong instruction alignment and chip expertise from the respective instruction and chip LLMs. Our results demonstrate that ChipAlign significantly enhances instruction-following capabilities of existing chip LLMs, achieving up to a 26.6% improvement on the IFEval benchmark, while maintaining comparable expertise in the chip domain. This improvement in instruction alignment also translates to notable gains in instruction-involved QA tasks, delivering performance enhancements of 3.9% on the OpenROAD QA benchmark and 8.25% on production-level chip QA benchmarks, surpassing state-of-the-art baselines.
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