提出一种低功耗脉冲编码硬件，可高效处理声音与心电图信号。
A General-Purpose Neuromorphic Sensor based on Spiketrum Algorithm: Hardware Details and Real-life Applications
- 用Spiketrum算法将模拟信号转为时空脉冲模式，全硬件实现。
- 在FPGA和TSMC180工艺中验证，资源占用降低52%至6%。
- 适合耳蜗植入等低功耗神经设备，兼顾效率与可扩展性。
脉冲神经网络（SNNs）通过脉冲传递信息，提供生物启发式计算范式，实现高效能低功耗数据处理。尽管SNN硬件取得进展，脉冲编码仍多依赖软件，制约效率。本文提出一种面积优化的Spiketrum算法硬件实现，将时变模拟信号编码为时空脉冲模式。相比以往侧重性能的设计，本方案聚焦减少硬件开销，在FPGA上实现，且已集成至采用TSMC180工艺的IC中。实验表明，该系统在声音与心电图分类任务中表现有效。结果揭示性能与资源效率间的权衡，为耳蜗植入等低功耗神经设备提供灵活、可扩展的类脑计算解决方案。
原文摘要 · Abstract (English)
Spiking Neural Networks (SNNs) offer a biologically inspired computational paradigm, enabling energy-efficient data processing through spike-based information transmission. Despite notable advancements in hardware for SNNs, spike encoding has largely remained software-dependent, limiting efficiency. This paper addresses the need for adaptable and resource-efficient spike encoding hardware by presenting an area-optimized hardware implementation of the Spiketrum algorithm, which encodes time-varying analogue signals into spatiotemporal spike patterns. Unlike earlier performance-optimized designs, which prioritize speed, our approach focuses on reducing hardware footprint, achieving a 52% reduction in Block RAMs (BRAMs), 31% fewer Digital Signal Processing (DSP) slices, and a 6% decrease in Look-Up Tables (LUTs). The proposed implementation has been verified on an FPGA and successfully integrated into an IC using TSMC180 technology. Experimental results demonstrate the system's effectiveness in real-world applications, including sound and ECG classification. This work highlights the trade-offs between performance and resource efficiency, offering a flexible, scalable solution for neuromorphic systems in power-sensitive applications like cochlear implants and neural devices.
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