用新型忆容器件构建神经网络加速框架，实现高精度图像分类。
Analysis of a Memcapacitor-Based for Neural Network Accelerator Framework
- 设计基于CMOS的忆容电路，通过交叉阵列实现并行计算。
- 在手写数字和CIFAR数据集上分别达到98.4%和94.4%训练准确率。
- 为类脑计算硬件提供可扩展的低功耗加速方案，适合芯片设计者参考。
数据密集型计算任务（如神经网络训练）对人工智能至关重要，但能耗高昂。本文提出一种基于CMOS的忆容器电路，利用Cadence工具验证，并在Python中实现设备模型以支持加速器设计。所提框架采用忆容器交叉阵列，用于训练神经网络完成数字分类与CIFAR数据集识别。测试了器件非理想特性下的系统表现：在手写数字识别任务中达到98.4%训练准确率，在CIFAR识别任务中达94.4%。结果表明，忆容器基神经网络系统具备处理分类任务的潜力，为类脑计算硬件发展奠定基础。
原文摘要 · Abstract (English)
Data-intensive computing tasks, such as training neural networks, are crucial for artificial intelligence applications but often come with high energy demands. One promising solution is to develop specialized hardware that directly maps neural networks, utilizing arrays of memristive devices to perform parallel multiply-accumulate operations. In our research, we introduce a novel CMOS-based memcapacitor circuit that is validated using the cadence tool. Additionally, we developed the device in Python to facilitate the design of a memcapacitive-based accelerator. Our proposed framework employs a crossbar array of memcapacitor devices to train a neural network capable of digit classification and CIFAR dataset recognition. We tested the non-ideal characteristics of the constructed memcapacitor-based neural network. The system achieved an impressive 98.4% training accuracy in digit recognition and 94.4% training accuracy in CIFAR recognition, highlighting its effectiveness. This study demonstrates the potential of memcapacitor-based neural network systems in handling classification tasks and sets the stage for further advancements in neuromorphic computing.
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