用大模型生成硬件代码，测试其在高层次综合中的效果。
Exploring Code Language Models for Automated HLS-based Hardware Generation: Benchmark, Infrastructure and Analysis
- 微调大模型生成高层次综合代码，构建端到端自动化框架。
- 验证思维链与反馈机制能提升生成代码质量。
- 提供基准测试和评估工具，推动硬件生成研究发展。
近年来，代码生成技术的发展揭示了大型语言模型（LLM）在通用编程语言（如Python、C++）中的潜力，为自动化软件开发和提升程序员效率带来了新机遇。这一趋势也激发了对自动化硬件生成的兴趣。尽管已有初步尝试将LLM用于生成硬件描述语言（HDL），但仍面临三大挑战：一是可用的HDL训练数据量远小于软件编程语言；二是预训练的LLM主要针对软件代码，生成的HDL设计错误率较高；三是硬件生成所需令牌数远高于软件编程，导致成本和能耗效率低下。为此，本文探索利用LLM生成基于高层次综合（HLS）的硬件设计。尽管领域特定语言的代码生成已有研究，但本文旨在提供实验结果、深入见解、基准测试及评估基础设施，以检验HLS相较于低层HDL在LLM辅助硬件生成中的适用性。为此，我们首先使用包含文本提示与对应参考HLS设计的数据集对预训练模型进行微调，并提出一个支持思维链与反馈机制的LLM辅助框架，实现端到端硬件代码生成。受研究周期限制，未来计划评估更先进的推理模型。
原文摘要 · Abstract (English)
Recent advances in code generation have illuminated the potential of employing large language models (LLMs) for general-purpose programming languages such as Python and C++, opening new opportunities for automating software development and enhancing programmer productivity. The potential of LLMs in software programming has sparked significant interest in exploring automated hardware generation and automation. Although preliminary endeavors have been made to adopt LLMs in generating hardware description languages (HDLs), several challenges persist in this direction. First, the volume of available HDL training data is substantially smaller compared to that for software programming languages. Second, the pre-trained LLMs, mainly tailored for software code, tend to produce HDL designs that are more error-prone. Third, the generation of HDL requires a significantly higher number of tokens compared to software programming, leading to inefficiencies in cost and energy consumption. To tackle these challenges, this paper explores leveraging LLMs to generate High-Level Synthesis (HLS)-based hardware design. Although code generation for domain-specific programming languages is not new in the literature, we aim to provide experimental results, insights, benchmarks, and evaluation infrastructure to investigate the suitability of HLS over low-level HDLs for LLM-assisted hardware design generation. To achieve this, we first finetune pre-trained models for HLS-based hardware generation, using a collected dataset with text prompts and corresponding reference HLS designs. An LLM-assisted framework is then proposed to automate end-to-end hardware code generation, which also investigates the impact of chain-of-thought and feedback loops promoting techniques on HLS-design generation. Limited by the timeframe of this research, we plan to evaluate more advanced reasoning models in the future.
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