DeepCircuitX构建了覆盖多层级的RTL代码数据集,支持硬件设计的智能理解与优化。
DeepCircuitX: A Comprehensive Repository-Level Dataset for RTL Code Understanding, Generation, and PPA Analysis
- 构建涵盖仓库、文件、模块、区块的多层级RTL数据结构
- 包含链式思维注释与综合网表,实现从代码到功耗性能面积的预测
- 适用于LLM训练,适合芯片设计自动化与AI辅助硬件开发人员
本文提出DeepCircuitX,一个面向寄存器传输级(RTL)代码理解、生成与功耗-性能-面积(PPA)分析的综合性仓库级数据集。与仅限于文件级RTL或物理布局数据的现有数据集不同,DeepCircuitX覆盖仓库、文件、模块和块级的多层级结构,支持大语言模型(LLMs)在RTL任务上的精细化训练与评估。数据集包含链式思维(CoT)注释,提供多层级功能与结构描述,提升对代码理解、生成与补全等任务的支持。此外,数据集包含合成网表及PPA指标,可实现从RTL代码直接预测早期设计阶段的功耗、性能与面积表现。我们在多个微调后的LLM上验证了数据集的有效性,并通过人工评估确认其质量。DeepCircuitX是推动硬件设计自动化中面向RTL的机器学习应用的关键资源。数据已公开于https://zeju.gitbook.io/lcm-team。
原文摘要 · Abstract (English)
This paper introduces DeepCircuitX, a comprehensive repository-level dataset designed to advance RTL (Register Transfer Level) code understanding, generation, and power-performance-area (PPA) analysis. Unlike existing datasets that are limited to either file-level RTL code or physical layout data, DeepCircuitX provides a holistic, multilevel resource that spans repository, file, module, and block-level RTL code. This structure enables more nuanced training and evaluation of large language models (LLMs) for RTL-specific tasks. DeepCircuitX is enriched with Chain of Thought (CoT) annotations, offering detailed descriptions of functionality and structure at multiple levels. These annotations enhance its utility for a wide range of tasks, including RTL code understanding, generation, and completion. Additionally, the dataset includes synthesized netlists and PPA metrics, facilitating early-stage design exploration and enabling accurate PPA prediction directly from RTL code. We demonstrate the dataset's effectiveness on various LLMs finetuned with our dataset and confirm the quality with human evaluations. Our results highlight DeepCircuitX as a critical resource for advancing RTL-focused machine learning applications in hardware design automation.Our data is available at https://zeju.gitbook.io/lcm-team.
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