无需训练，用提示工程与检索增强解决大模型生成硬件代码的幻觉问题
HDLCoRe: A Training-Free Framework for Mitigating Hallucinations in LLM-Generated HDL
- 通过分步自验证提示引导模型逐步生成并检查硬件代码
- 在RTLLM2.0基准上显著降低幻觉率，提升语法与功能正确性
- 适合需要快速生成可靠硬件代码的工程师和自动化设计场景
大型语言模型在代码生成任务中表现卓越，但在硬件描述语言（HDL）领域因数据稀缺导致严重幻觉和错误生成。为此，我们提出HDLCoRe，一种无需训练的框架，通过提示工程与检索增强生成（RAG）提升LLMs的HDL生成能力。该框架包含两个核心组件：(1) 面向HDL的思维链（CoT）提示技术，结合自验证机制，按任务复杂度与类型分类，融入领域知识，并引导模型分步自仿真以纠错；(2) 两阶段异构RAG系统，通过关键组件提取解决格式不一致问题，并通过顺序过滤与重排序高效检索相关HDL示例。HDLCoRe无需模型微调即可显著提升生成质量。实验表明，在RTLLM2.0基准上，该框架有效降低幻觉率，大幅提高语法与功能正确性。
原文摘要 · Abstract (English)
Recent advances in large language models (LLMs) have demonstrated remarkable capabilities in code generation tasks. However, when applied to hardware description languages (HDL), these models exhibit significant limitations due to data scarcity, resulting in hallucinations and incorrect code generation. To address these challenges, we propose HDLCoRe, a training-free framework that enhances LLMs' HDL generation capabilities through prompt engineering techniques and retrieval-augmented generation (RAG). Our approach consists of two main components: (1) an HDL-aware Chain-of-Thought (CoT) prompting technique with self-verification that classifies tasks by complexity and type, incorporates domain-specific knowledge, and guides LLMs through step-by-step self-simulation for error correction; and (2) a two-stage heterogeneous RAG system that addresses formatting inconsistencies through key component extraction and efficiently retrieves relevant HDL examples through sequential filtering and re-ranking. HDLCoRe eliminates the need for model fine-tuning while substantially improving LLMs' HDL generation capabilities. Experimental results demonstrate that our framework achieves superior performance on the RTLLM2.0 benchmark, significantly reducing hallucinations and improving both syntactic and functional correctness.
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