用可微优化设计高速乘法器，性能面积双提升。
DOMAC: Differentiable Optimization for High-Speed Multipliers and Multiply-Accumulators
- 将多级并行压缩树优化类比为训练神经网络，转为连续可微问题。
- 在特定工艺节点上，相比顶尖方案性能提升显著，面积更紧凑。
- 适合芯片架构师与数字电路设计师快速生成高性能乘法模块。
乘法器和乘加单元（MAC）是人工智能等计算密集型应用的基础组件。随着摩尔定律效益递减，提升乘法器性能需依赖工艺感知的架构创新，而非单纯技术缩放。本文提出DOMAC，一种基于可微优化的乘法器与MAC设计方法，针对特定工艺节点进行优化。DOMAC将多级并行压缩树的优化类比为深度神经网络训练，通过引入可微的时间与面积目标，将离散优化问题转化为连续可解问题。该形式化使我们能利用现有深度学习工具链高效实现可微求解器。实验结果表明，相比最先进基线及商用IP，DOMAC在乘法器与MAC设计中均实现了显著的性能与面积效率提升。
原文摘要 · Abstract (English)
Multipliers and multiply-accumulators (MACs) are fundamental building blocks for compute-intensive applications such as artificial intelligence. With the diminishing returns of Moore's Law, optimizing multiplier performance now necessitates process-aware architectural innovations rather than relying solely on technology scaling. In this paper, we introduce DOMAC, a novel approach that employs differentiable optimization for designing multipliers and MACs at specific technology nodes. DOMAC establishes an analogy between optimizing multi-staged parallel compressor trees and training deep neural networks. Building on this insight, DOMAC reformulates the discrete optimization challenge into a continuous problem by incorporating differentiable timing and area objectives. This formulation enables us to utilize existing deep learning toolkit for highly efficient implementation of the differentiable solver. Experimental results demonstrate that DOMAC achieves significant enhancements in both performance and area efficiency compared to state-of-the-art baselines and commercial IPs in multiplier and MAC designs.
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