提出异构混合存算架构，动态优化边缘AI的能效与性能。
HH-PIM: Dynamic Optimization of Power and Performance with Heterogeneous-Hybrid PIM for Edge AI Devices
- 采用高低功耗混合存算模块，按需分配计算资源。
- 实测平均节能60.43%，满足延迟要求。
- 适合对能效敏感的边缘AI设备部署。
存算一体（PIM）架构为能源受限的边缘环境中的AI应用提供了高效解决方案。传统PIM通过减少内存与计算单元间的数据移动提升性能和能效，但在边缘设备中受限于持续的功耗需求以及大神经网络权重在SRAM和DRAM中的存储压力。混合PIM架构引入如MRAM和ReRAM等非易失性存储器，缓解了上述问题，但面临固定计算资源与动态推理负载不匹配的挑战。为此，本文提出异构混合存算（HH-PIM）架构，包含高性能与低功耗的MRAM-SRAM PIM模块。进一步设计数据放置优化算法，根据计算需求动态分配数据，最大化能效。基于FPGA原型与处理器级功耗仿真表明，所提HH-PIM相比传统PIM平均节能达60.43%，同时满足应用延迟要求。结果验证了其在边缘设备中实现自适应、高能效AI处理的可行性。
原文摘要 · Abstract (English)
Processing-in-Memory (PIM) architectures offer promising solutions for efficiently handling AI applications in energy-constrained edge environments. While traditional PIM designs enhance performance and energy efficiency by reducing data movement between memory and processing units, they are limited in edge devices due to continuous power demands and the storage requirements of large neural network weights in SRAM and DRAM. Hybrid PIM architectures, incorporating non-volatile memories like MRAM and ReRAM, mitigate these limitations but struggle with a mismatch between fixed computing resources and dynamically changing inference workloads. To address these challenges, this study introduces a Heterogeneous-Hybrid PIM (HH-PIM) architecture, comprising high-performance MRAM-SRAM PIM modules and low-power MRAM-SRAM PIM modules. We further propose a data placement optimization algorithm that dynamically allocates data based on computational demand, maximizing energy efficiency. FPGA prototyping and power simulations with processors featuring HH-PIM and other PIM types demonstrate that the proposed HH-PIM achieves up to $60.43$ percent average energy savings over conventional PIMs while meeting application latency requirements. These results confirm the suitability of HH-PIM for adaptive, energy-efficient AI processing in edge devices.
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