通过近似计算与遗传算法，降低3D神经网络加速器的碳足迹。
Carbon-Efficient 3D DNN Acceleration: Optimizing Performance and Sustainability
- 用近似乘法器优化MAC单元，减少芯片面积和制造开销。
- 在45nm至7nm工艺下，碳排放最多降低30%，精度损失极小。
- 适合关注硬件可持续性与能效优化的研究者与工程师。
随着深度神经网络（DNN）推动人工智能发展，硬件加速器设计面临因复杂制造工艺带来的隐含碳足迹问题。3D集成虽提升性能，却带来可持续性挑战，因此碳意识优化至关重要。本文提出一种面向3D DNN加速器的碳效率设计方法，结合近似计算与基于遗传算法的设计空间探索，优化碳延迟乘积（CDP）。通过在乘累加（MAC）单元中集成面积高效的近似乘法器，该方法有效降低硅面积与制造开销，同时保持高计算精度。在三个技术节点（45nm、14nm和7nm）上的实验表明，本方法可实现最高达30%的隐含碳减排，且精度损失可忽略不计。
原文摘要 · Abstract (English)
As Deep Neural Networks (DNNs) continue to drive advancements in artificial intelligence, the design of hardware accelerators faces growing concerns over embodied carbon footprint due to complex fabrication processes. 3D integration improves performance but introduces sustainability challenges, making carbon-aware optimization essential. In this work, we propose a carbon-efficient design methodology for 3D DNN accelerators, leveraging approximate computing and genetic algorithm-based design space exploration to optimize Carbon Delay Product (CDP). By integrating area-efficient approximate multipliers into Multiply-Accumulate (MAC) units, our approach effectively reduces silicon area and fabrication overhead while maintaining high computational accuracy. Experimental evaluations across three technology nodes (45nm, 14nm, and 7nm) show that our method reduces embodied carbon by up to 30% with negligible accuracy drop.
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