研究编译器如何影响模型在不同硬件上的性能表现
Leveraging Neural Graph Compilers in Machine Learning Research for Edge-Cloud Systems
- 通过细粒度实验分析编译器对模型性能的影响
- 发现编译器使不同架构的性能排名可能反转
- 适合关注边缘-云部署优化的研究者与工程师
本文系统评估了神经网络图编译器在异构硬件平台上的表现，填补了理论优化与实际部署之间的关键空白。研究表明，厂商特定的优化可能导致不同架构间的相对性能比较失效，性能优势甚至在编译后完全逆转。我们的分析揭示，图编译器的性能表现高度依赖于神经网络架构和批处理大小。通过块级精细实验，我们发现厂商编译器能利用简单架构中的重复模式，在模型深度增加时带来不成比例的吞吐量提升。我们提出了新的指标来量化编译器在批处理规模增大时缓解性能摩擦的能力。该方法将编译器影响贯穿研究全过程，连接学术研究与实际部署，为在异构硬件环境中优化的实践者提供可操作的洞察。
原文摘要 · Abstract (English)
This work presents a comprehensive evaluation of neural network graph compilers across heterogeneous hardware platforms, addressing the critical gap between theoretical optimization techniques and practical deployment scenarios. We demonstrate how vendor-specific optimizations can invalidate relative performance comparisons between architectural archetypes, with performance advantages sometimes completely reversing after compilation. Our systematic analysis reveals that graph compilers exhibit performance patterns highly dependent on both neural architecture and batch sizes. Through fine-grained block-level experimentation, we establish that vendor-specific compilers can leverage repeated patterns in simple architectures, yielding disproportionate throughput gains as model depth increases. We introduce novel metrics to quantify a compiler's ability to mitigate performance friction as batch size increases. Our methodology bridges the gap between academic research and practical deployment by incorporating compiler effects throughout the research process, providing actionable insights for practitioners navigating complex optimization landscapes across heterogeneous hardware environments.
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