用束搜索提升强化学习在模拟电路版图设计中的效率与灵活性。
Enhancing Reinforcement Learning for the Floorplanning of Analog ICs with Beam Search
- 将强化学习与束搜索结合，优化版图生成推理过程。
- 面积、空隙和线长改善5%-85%，奖励显著提升。
- 无需重训练即可适应不同权重，适合工业级电路设计。
模拟集成电路的版图设计需权衡复杂因素，同时考虑器件物理特性与电路变异性，导致基于学习的方法难以实现完全自动化。近年来，强化学习（RL）在解决版图规划问题上取得显著进展。本文提出一种混合方法，将强化学习与束搜索（BS）策略相结合。束搜索增强智能体的推理过程，使版图生成更具灵活性，可适应不同目标权重，并在不需策略重训练或微调的情况下解决拥塞问题。同时，保持了强化学习对电路特征与约束的高效处理能力及泛化性能。实验结果表明，相比标准强化学习方法，面积、空隙和半周长布线长度改善约5%-85%，智能体获得更高奖励。性能与效率接近现有最先进技术。
原文摘要 · Abstract (English)
The layout of analog ICs requires making complex trade-offs, while addressing device physics and variability of the circuits. This makes full automation with learning-based solutions hard to achieve. However, reinforcement learning (RL) has recently reached significant results, particularly in solving the floorplanning problem. This paper presents a hybrid method that combines RL with a beam (BS) strategy. The BS algorithm enhances the agent's inference process, allowing for the generation of flexible floorplans by accomodating various objective weightings, and addressing congestion without without the need for policy retraining or fine-tuning. Moreover, the RL agent's generalization ability stays intact, along with its efficient handling of circuit features and constraints. Experimental results show approx. 5-85% improvement in area, dead space and half-perimeter wire length compared to a standard RL application, along with higher rewards for the agent. Moreover, performance and efficiency align closely with those of existing state-of-the-art techniques.
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