为微控制器设计的高效卷积网络融合方法，显著降低内存占用。
msf-CNN: Patch-based Multi-Stage Fusion with Convolutional Neural Networks for TinyML
- 通过有向无环图搜索最优分块融合策略
- 在微控制器上实现内存减少50%
- 适用于资源受限的实时嵌入式系统设计
人工智能从大语言模型到运行在微控制器（MCU）上的微型模型。极低内存占用的模型架构对适配MCU的微小内存预算（如128kB RAM）至关重要，同时推理延迟必须足够低以满足实时性要求。分块融合是一种优化神经网络各层间数据流的方法。本文提出msf-CNN，一种新型技术，通过遍历表示为有向无环图的融合解空间，高效找到卷积神经网络（CNN）在MCU上的最优融合配置。相比先前针对MCU的CNN融合工作，msf-CNN能发现更广泛的可行解。我们已在多种微控制器（ARM Cortex-M、RISC-V、ESP32）上实现msf-CNN。实验表明，msf-CNN相比先前方案（MCUNetV2和StreamNet）可将推理所需内存降低50%。本研究展示了msf-CNN为系统设计者带来的额外灵活性。
原文摘要 · Abstract (English)
AI spans from large language models to tiny models running on microcontrollers (MCUs). Extremely memory-efficient model architectures are decisive to fit within an MCU's tiny memory budget e.g., 128kB of RAM. However, inference latency must remain small to fit real-time constraints. An approach to tackle this is patch-based fusion, which aims to optimize data flows across neural network layers. In this paper, we introduce msf-CNN, a novel technique that efficiently finds optimal fusion settings for convolutional neural networks (CNNs) by walking through the fusion solution space represented as a directed acyclic graph. Compared to previous work on CNN fusion for MCUs, msf-CNN identifies a wider set of solutions. We published an implementation of msf-CNN running on various microcontrollers (ARM Cortex-M, RISC-V, ESP32). We show that msf-CNN can achieve inference using 50% less RAM compared to the prior art (MCUNetV2 and StreamNet). We thus demonstrate how msf-CNN offers additional flexibility for system designers.
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