用模拟硬件验证大模型在忆阻器上的语音识别可行性。
Running Conventional Automatic Speech Recognition on Memristor Hardware: A Simulated Approach
- 基于PyTorch构建高保真忆阻器硬件仿真库，支持复杂模型运行。
- 3比特权重下，词错误率仅上升25%，实现高效低功耗推理。
- 首次在百万级参数模型上验证忆阻器硬件可行性，适合硬件加速研究者。
忆阻器硬件通过模拟内存内矩阵乘法，为节能机器学习带来新可能。现有硬件原型无法容纳大型神经网络，相关研究多集中于小规模模型（如MNIST或单字识别）。通过仿真可探索硬件特性对大模型的影响，但现有软件对硬件假设过于简化。本文提出一个基于PyTorch的仿真库，基于Synaptogen框架，精确捕捉忆阻器硬件特性。首次展示了拥有数百万参数的机器学习系统在忆阻器硬件上的运行表现，以在TED-LIUMv2数据集上训练的Conformer模型为例。通过调整量化感知训练，在使用3比特权重精度进行模拟模拟计算时，词错误率相对下降控制在25%以内。
原文摘要 · Abstract (English)
Memristor-based hardware offers new possibilities for energy-efficient machine learning (ML) by providing analog in-memory matrix multiplication. Current hardware prototypes cannot fit large neural networks, and related literature covers only small ML models for tasks like MNIST or single word recognition. Simulation can be used to explore how hardware properties affect larger models, but existing software assumes simplified hardware. We propose a PyTorch-based library based on "Synaptogen" to simulate neural network execution with accurately captured memristor hardware properties. For the first time, we show how an ML system with millions of parameters would behave on memristor hardware, using a Conformer trained on the speech recognition task TED-LIUMv2 as example. With adjusted quantization-aware training, we limit the relative degradation in word error rate to 25% when using a 3-bit weight precision to execute linear operations via simulated analog computation.
Thank you to arXiv for use of its open access interoperability. PaperDance 不是 arXiv 官方产品；中文卡片由大模型生成，请以原文为准。