arXiv:2506.07735cs.LGcs.CV2025-06

用语言嵌入与动态图结合,实现跨硬件的神经网络架构预测

Language Embedding Meets Dynamic Graph: A New Exploration for Neural Architecture Representation Learning

  • 将架构与硬件信息统一映射到语义空间,实现零样本跨平台预测
  • 在NNLQP上达到新SOTA,首次实现跨硬件延迟预测
  • 适合做神经网络设计与硬件适配的研究者参考

神经架构表征学习旨在将网络模型转化为特征表示以预测网络属性,在真实场景的部署与设计中至关重要。受Transformer成功启发,融合图神经网络的Transformer模型已在表征学习方面取得显著进展。然而现有方法仍存在局限:其一,忽略硬件属性信息,与多样化深度学习硬件趋势冲突,限制模型实用性;其二,编码依赖静态邻接矩阵,无法捕捉计算节点间的结构差异,影响编码效果。本文提出LeDG-Former框架,通过语言嵌入与动态图表征学习的协同融合,解决上述问题。具体地,受大语言模型启发,构建语言嵌入框架,将神经架构与硬件规格通过分词和LLM处理投影至统一语义空间,首次实现跨硬件平台的零样本预测。同时提出基于动态图的Transformer建模神经架构,提升建模性能。在NNLQP基准上,LeDG-Former超越先前方法,建立新SOTA,且首次实现跨硬件延迟预测。此外,在细胞结构的NAS-Bench-101与NAS-Bench-201数据集上也表现优异。

原文摘要 · Abstract (English)

Neural Architecture Representation Learning aims to transform network models into feature representations for predicting network attributes, playing a crucial role in deploying and designing networks for real-world applications. Recently, inspired by the success of transformers, transformer-based models integrated with Graph Neural Networks (GNNs) have achieved significant progress in representation learning. However, current methods still have some limitations. First, existing methods overlook hardware attribute information, which conflicts with the current trend of diversified deep learning hardware and limits the practical applicability of models. Second, current encoding approaches rely on static adjacency matrices to represent topological structures, failing to capture the structural differences between computational nodes, which ultimately compromises encoding effectiveness. In this paper, we introduce LeDG-Former, an innovative framework that addresses these limitations through the synergistic integration of language-based semantic embedding and dynamic graph representation learning. Specifically, inspired by large language models (LLMs), we propose a language embedding framework where both neural architectures and hardware platform specifications are projected into a unified semantic space through tokenization and LLM processing, enabling zero-shot prediction across different hardware platforms for the first time. Then, we propose a dynamic graph-based transformer for modeling neural architectures, resulting in improved neural architecture modeling performance. On the NNLQP benchmark, LeDG-Former surpasses previous methods, establishing a new SOTA while demonstrating the first successful cross-hardware latency prediction capability. Furthermore, our framework achieves superior performance on the cell-structured NAS-Bench-101 and NAS-Bench-201 datasets.

架构表征动态图跨硬件语言嵌入

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