对比事件驱动与时钟驱动神经元，找出更省电的类脑硬件设计。
Energy-Efficient Digital Design: A Comparative Study of Event-Driven and Clock-Driven Spiking Neurons
- 用软件模拟多种漏积分放电神经元模型，快速验证性能。
- FPGA实测显示事件驱动在低功耗下延迟更低，能效提升显著。
- 适合做实时、低功耗类脑计算系统的设计参考。
本文针对硬件加速中的脉冲神经网络（SNN）神经元模型，对比了事件驱动与时钟驱动实现方式。研究首先在软件层面，基于多种漏积分放电（LIF）神经元变体，在多个数据集上快速原型并测试SNN模型，实现可控的性能评估并指导设计优化。随后在FPGA上开展硬件实验，验证仿真结果，并深入分析输入刺激变化对延迟、功耗、能效及资源利用率等关键指标的影响。研究结果为构建高效、实时的类脑神经形态系统提供了实用设计指南。整体工作贯通了软件仿真与硬件实现，推动下一代SNN加速器的发展。
原文摘要 · Abstract (English)
This paper presents a comprehensive evaluation of Spiking Neural Network (SNN) neuron models for hardware acceleration by comparing event driven and clock-driven implementations. We begin our investigation in software, rapidly prototyping and testing various SNN models based on different variants of the Leaky Integrate and Fire (LIF) neuron across multiple datasets. This phase enables controlled performance assessment and informs design refinement. Our subsequent hardware phase, implemented on FPGA, validates the simulation findings and offers practical insights into design trade offs. In particular, we examine how variations in input stimuli influence key performance metrics such as latency, power consumption, energy efficiency, and resource utilization. These results yield valuable guidelines for constructing energy efficient, real time neuromorphic systems. Overall, our work bridges software simulation and hardware realization, advancing the development of next generation SNN accelerators.
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