提出新正则化方法，提升量子机器学习在有限硬件上的可扩展性。
CutReg: A loss regularizer for enhancing the scalability of QML via adaptive circuit cutting
- 在优化中引入采样开销正则项，动态平衡电路切割与模型精度。
- 实验证明能有效降低切割带来的样本需求，支持更大规模量子任务。
- 适合研究量子优势的团队，尤其关注硬件受限下的算法设计。
量子机器学习（QML）能否实现颠覆性优势仍是开放问题。当前量子硬件（如NISQ设备）在电路深度和连通性上存在严重限制，阻碍了量子优势的验证及对梯度消失等关键障碍的实证研究。电路切割技术通过将大电路拆分为子电路，在小规模、低连通性硬件上运行，但需更多样本进行经典后处理以准确估计期望值。本文提出一种新型正则化项，直接惩罚采样开销。该方法使优化器在门切割优势与标准机器学习损失之间取得平衡，有效管理切割带来的计算开销，同时保持模型整体准确性，为探索更大更复杂的量子问题、推动量子优势研究提供可行路径。
原文摘要 · Abstract (English)
Whether QML can offer a transformative advantage remains an open question. The severe constraints of NISQ hardware, particularly in circuit depth and connectivity, hinder both the validation of quantum advantage and the empirical investigation of major obstacles like barren plateaus. Circuit cutting techniques have emerged as a strategy to execute larger quantum circuits on smaller, less connected hardware by dividing them into subcircuits. However, this partitioning increases the number of samples needed to estimate the expectation value accurately through classical post-processing compared to estimating it directly from the full circuit. This work introduces a novel regularization term into the QML optimization process, directly penalizing the overhead associated with sampling. We demonstrate that this approach enables the optimizer to balance the advantages of gate cutting against the optimization of the typical ML cost function. Specifically, it navigates the trade-off between minimizing the cutting overhead and maintaining the overall accuracy of the QML model, paving the way to study larger complex problems in pursuit of quantum advantage.
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