DeepRTL2统一解决RTL代码生成与理解的多种任务,提升芯片设计效率。
DeepRTL2: A Versatile Model for RTL-Related Tasks
- 基于大语言模型,同时支持生成与嵌入式任务
- 在代码搜索、等价验证、性能预测上均达顶尖水平
- 适合芯片设计自动化研究者和工程师使用
将大语言模型(LLMs)引入电子设计自动化(EDA)显著推动了该领域发展,尤其在寄存器传输级(RTL)代码生成与理解方面。尽管已有研究证明微调LLMs在生成类任务中的有效性,但同样关键的嵌入类任务——如自然语言代码搜索、RTL功能等价性检查、性能预测——却长期被忽视。为填补这一空白,我们提出DeepRTL2,一个涵盖RTL相关生成与嵌入任务的通用模型家族。通过同时处理多种任务,DeepRTL2是首个提供全面解决方案的模型。大量实验表明,其在所有评估任务中均达到当前最优性能。
原文摘要 · Abstract (English)
The integration of large language models (LLMs) into electronic design automation (EDA) has significantly advanced the field, offering transformative benefits, particularly in register transfer level (RTL) code generation and understanding. While previous studies have demonstrated the efficacy of fine-tuning LLMs for these generation-based tasks, embedding-based tasks, which are equally critical to EDA workflows, have been largely overlooked. These tasks, including natural language code search, RTL code functionality equivalence checking, and performance prediction, are essential for accelerating and optimizing the hardware design process. To address this gap, we present DeepRTL2, a family of versatile LLMs that unifies both generation- and embedding-based tasks related to RTL. By simultaneously tackling a broad range of tasks, DeepRTL2 represents the first model to provide a comprehensive solution to the diverse challenges in EDA. Through extensive experiments, we show that DeepRTL2 achieves state-of-the-art performance across all evaluated tasks.
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