用大模型从论文中提取模拟电路尺寸关系，大幅提高设计效率。
A Large Language Model-based Multi-Agent Framework for Analog Circuits' Sizing Relationships Extraction
- 构建基于大模型的多智能体框架，自动提取电路尺寸关系。
- 在3类电路上实现2.32至26.6倍的优化效率提升。
- 适合需要加速模拟电路设计的工程师和研究者。
在模拟电路预布局阶段，器件尺寸设定是决定电路能否满足性能指标的关键步骤。现有技术将尺寸设定视为数学优化问题求解，并从数学角度持续提升优化效率，但忽略了先验知识的自动引入，未能有效压缩搜索空间，导致仍有较大优化余地。为此，我们提出一种基于大语言模型（LLM）的多智能体框架，从学术论文中提取模拟电路的尺寸关系。该框架可基于提取出的尺寸关系有效缩减尺寸设定过程中的搜索空间。我们在3种电路类型上进行了测试，优化效率提升了2.32至26.6倍。本工作表明，大语言模型能有效压缩模拟电路尺寸设定的搜索空间，为大模型与传统模拟电路设计自动化方法的结合提供了新思路。
原文摘要 · Abstract (English)
In the design process of the analog circuit pre-layout phase, device sizing is an important step in determining whether an analog circuit can meet the required performance metrics. Many existing techniques extract the circuit sizing task as a mathematical optimization problem to solve and continuously improve the optimization efficiency from a mathematical perspective. But they ignore the automatic introduction of prior knowledge, fail to achieve effective pruning of the search space, which thereby leads to a considerable compression margin remaining in the search space. To alleviate this problem, we propose a large language model (LLM)-based multi-agent framework for analog circuits' sizing relationships extraction from academic papers. The search space in the sizing process can be effectively pruned based on the sizing relationship extracted by this framework. Eventually, we conducted tests on 3 types of circuits, and the optimization efficiency was improved by $2.32 \sim 26.6 \times$. This work demonstrates that the LLM can effectively prune the search space for analog circuit sizing, providing a new solution for the combination of LLMs and conventional analog circuit design automation methods.
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