用铁电晶体管在像素内实现乘加运算，减少数据移动，适合边缘计算。
Multi-Domain FeFET-Based Pixel for In-Sensor Multiply-and-Accumulate Operations
- 在3管像素中嵌入可编程铁电晶体管，实现像素级模拟乘加
- 通过列线合并输出电流，完成全阵列乘加功能，功耗低
- 适合神经形态视觉、实时边缘计算等场景，支持安全传感
本文提出一种基于铁电场效应晶体管（FeFET）的有源像素传感器，利用铁电层的多畴极化状态，在像素内实现乘加（MAC）运算。设计将可编程FeFET集成于3晶体管像素电路中，其中FeFET的非易失性电导编码权重，光电二极管电压降编码输入信号，二者交互生成与乘积成比例的输出电流，实现像素级模拟乘法。通过共享列线对输出电流求和，完成累加操作，实现在图像传感器阵列内的完整MAC功能。基于45 nm CMOS模型的HSPICE仿真验证了该设计的有效性并确认其可扩展性。该紧凑且低功耗架构大幅减少了数据搬运，适用于实时边缘计算、神经形态视觉及安全传感应用。
原文摘要 · Abstract (English)
This paper presents an FeFET-based active pixel sensor that performs in-sensor multiply-and-accumulate (MAC) operations by leveraging the multi-domain polarization states of ferroelectric layers. The proposed design integrates a programmable FeFET into a 3-transistor pixel circuit, where the FeFET's non-volatile conductance encodes the weight, and the photodiode voltage drop encodes the input. Their interaction generates an output current proportional to the product, enabling in-pixel analog multiplication. Accumulation is achieved by summing output currents along shared column lines, realizing full MAC functionality within the image sensor array. Extensive HSPICE simulations, using 45 nm CMOS models, validate the operation and confirm the scalability of the design. This compact and power-efficient architecture minimizes data movement, making it ideal for real-time edge computing, neuromorphic vision, and secure sensing applications.
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