用大模型自动优化芯片设计参数，减少人工干预。
CROP: Circuit Retrieval and Optimization with Parameter Guidance using LLMs
- 将代码转为向量，通过相似电路检索匹配
- 结合历史设计知识，少迭代实现更好能效
- 适合芯片设计工程师快速调优流程
现代超大规模集成电路（VLSI）设计依赖电子设计自动化（EDA）工具实现。由于EDA算法复杂，参数空间庞大，即使中等数量的参数组合也带来巨大的搜索挑战。目前工业界仍依赖人工调参，效率低且受限于专家经验。为此，我们提出CROP，首个基于大语言模型（LLM）的自动VLSI设计流程调优框架。方法包括：（1）可扩展的RTL源码到稠密向量表示转换方法；（2）基于嵌入的检索系统，用于匹配语义相似电路；（3）融合检索增强生成（RAG）的LLM引导参数搜索系统，利用相似设计的先验知识约束搜索过程。实验表明，CROP在工业级设计上以更少迭代次数达成更优质量结果（QoR），包括降低9.9%功耗。
原文摘要 · Abstract (English)
Modern very large-scale integration (VLSI) design requires the implementation of integrated circuits using electronic design automation (EDA) tools. Due to the complexity of EDA algorithms, the vast parameter space poses a huge challenge to chip design optimization, as the combination of even moderate numbers of parameters creates an enormous solution space to explore. Manual parameter selection remains industrial practice despite being excessively laborious and limited by expert experience. To address this issue, we present CROP, the first large language model (LLM)-powered automatic VLSI design flow tuning framework. Our approach includes: (1) a scalable methodology for transforming RTL source code into dense vector representations, (2) an embedding-based retrieval system for matching designs with semantically similar circuits, and (3) a retrieval-augmented generation (RAG)-enhanced LLM-guided parameter search system that constrains the search process with prior knowledge from similar designs. Experiment results demonstrate CROP's ability to achieve superior quality-of-results (QoR) with fewer iterations than existing approaches on industrial designs, including a 9.9% reduction in power consumption.
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