让深度学习加速器轻松接入编译器，无需懂底层细节
A High-Level Compiler Integration Approach for Deep Learning Accelerators Supporting Abstraction and Optimization
- 基于TVM构建抽象层，简化加速器集成流程
- 在Gemmini上实现与手工优化相当的性能
- 自动调度+设计空间探索，适合硬件开发人员
边缘计算平台中针对深度学习的领域专用架构日益普及，硬件加速器效率显著。然而，将自定义加速器集成到现代机器学习编译器中仍面临挑战，需对编译层进行大量修改及使用特殊调度技术。现有框架提供部分解决方案，但需用户深入理解编译器内部机制。本文提出一种基于TVM的编译集成方法，针对基于GEMM的深度学习加速器。该方法抽象编译集成复杂性，使加速器可无缝接入而无需掌握底层编译器知识。同时，扩展并集成设计空间探索工具CoSA，实现高效张量调度，考虑不均匀映射和双缓冲等因素。在Gemmini加速器上的基准测试表明，性能达到与其专用手工实现工具链相当水平。
原文摘要 · Abstract (English)
The growing adoption of domain-specific architectures in edge computing platforms for deep learning has highlighted the efficiency of hardware accelerators. However, integrating custom accelerators into modern machine learning (ML) compilers remains a complex challenge due to the need for significant modifications in compilation layers and specialized scheduling techniques. Existing frameworks offer partial solutions and require users to navigate intricate compiler internals. In this paper, we introduce a TVM-based compilation integration approach that targets GEMM-based deep learning accelerators. Our approach abstracts the complexities of compiler integration, enabling seamless integration of accelerators without requiring in-depth knowledge of the underlying compiler. Furthermore, we extend and incorporate design space exploration tools, specifically CoSA, to automate efficient tensor scheduling, accounting for factors such as uneven mapping and double buffering. Our framework is benchmarked on the Gemmini accelerator, demonstrating performance comparable to its specialized manually implemented toolchain.
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