用图神经网络分析时钟网格，速度快且精度高。
GATMesh: Clock Mesh Timing Analysis using Graph Neural Networks
- 将时钟网格建模为带物理特征的图，用GNN学习其行为
- 在未见基准上平均延迟误差仅5.27皮秒，比SPICE快47146倍
- 适合需要快速高精度时序分析的芯片设计工程师
时钟网格在高性能VLSI系统中对减小偏移和应对工艺电压温度（PVT）变化至关重要，但其分析因共汇路径、多源驱动和输入缓冲偏移而困难。SPICE仿真虽准确但速度慢；简化模型则会遗漏传播速率和输入偏移等关键效应。我们提出GATMesh，一种基于图神经网络（GNN）的框架，将时钟网格建模为带有增强结构与物理特征的图。在SPICE数据上训练后，GATMesh在未见基准上的平均延迟误差仅为5.27皮秒，同时相比多线程SPICE仿真实现47146倍加速。
原文摘要 · Abstract (English)
Clock meshes are essential in high-performance VLSI systems for minimizing skew and handling PVT variations, but analyzing them is difficult due to reconvergent paths, multi-source driving, and input mesh buffer skew. SPICE simulations are accurate but slow; yet simplified models miss key effects like slew and input skew. We propose GATMesh, a Graph Neural Network (GNN)-based framework that models the clock mesh as a graph with augmented structural and physical features. Trained on SPICE data, GATMesh achieves high accuracy with average delay error of 5.27ps on unseen benchmarks, while achieving speed-ups of 47146x over multi-threaded SPICE simulation.
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