在FPGA上加速水下声学感知的仿生听觉模型，实时低功耗运行。
Real-time CARFAC Cochlea Model Acceleration on FPGA for Underwater Acoustic Sensing Systems
- 用FPGA硬件加速CARFAC听觉模型，实现低延迟处理。
- 单实例64通道仅占13.5%硬件资源，256kHz信号实时处理功耗3.11W。
- 适合嵌入式水下声学系统开发，尤其关注能效与实时性场景。
本文提出一种实时、低功耗的嵌入式系统，用于水下声音分析，基于AMD Kria KV260系统级模块（SoM）构建。系统在处理器端采用基于Rust的软件框架，实现实时多水听器输入的接口与同步；在可编程门阵列（FPGA）上实现硬件加速的级联非对称谐振器快速压缩（CARFAC）听觉模型，完成实时声音预处理。相比先前工作，该加速器通过优化时间复用、流水线设计及消除高成本除法电路，实现了更高的可扩展性与处理速度，同时降低资源占用。实验结果表明，在实时处理256 kHz输入信号时，单个64通道CARFAC实例仅占用13.5%的硬件资源，整板功耗为3.11 W。
原文摘要 · Abstract (English)
This paper presents a real-time, energy-efficient embedded system implementing an array of Cascade of Asymmetric Resonators with Fast-Acting Compression (CARFAC) cochlea models for underwater sound analysis. Built on the AMD Kria KV260 System-on-Module (SoM), the system integrates a Rust-based software framework on the processor for real-time interfacing and synchronization with multiple hydrophone inputs, and a hardware-accelerated implementation of the CARFAC models on a Field-Programmable Gate Array (FPGA) for real-time sound pre-processing. Compared to prior work, the CARFAC accelerator achieves improved scalability and processing speed while reducing resource usage through optimized time-multiplexing, pipelined design, and elimination of costly division circuits. Experimental results demonstrate 13.5% hardware utilization for a single 64-channel CARFAC instance and a whole board power consumption of 3.11 W when processing a 256 kHz input signal in real time.
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