用LLM+gm/Id数据实现高效精准的模拟电路自动设计
White-Box Reasoning: Synergizing LLM Strategy and gm/Id Data for Automated Analog Circuit Design
- 将LLM策略与gm/Id数据表结合，实现量化设计推理
- 5次迭代即满足所有温度电压工艺角要求
- 适合追求高效、可复现的模拟电路设计人员
模拟集成电路设计因依赖经验且仿真效率低而成为瓶颈，传统公式在先进制程下失效。直接应用大语言模型（LLMs）易陷入无工程依据的“猜测”。本文提出一种“协同推理”框架，将LLM的战略推理能力与gm/Id方法的物理精度融合。通过赋予LLM gm/Id查找表，使其变为可量化的数据驱动设计伙伴。我们在两级运算放大器上验证该框架，使Gemini模型仅用5次迭代便满足所有TT角落规格，并扩展至全部PVT角落。关键消融实验表明，gm/Id数据是实现效率与精度的关键；缺失时，LLM速度更慢且偏离目标。相比资深工程师设计，本框架以数量级提升效率，达到准专家水平。该工作验证了结合LLM推理与科学电路设计方法实现真正模拟电路自动化的路径。
原文摘要 · Abstract (English)
Analog IC design is a bottleneck due to its reliance on experience and inefficient simulations, as traditional formulas fail in advanced nodes. Applying Large Language Models (LLMs) directly to this problem risks mere "guessing" without engineering principles. We present a "synergistic reasoning" framework that integrates an LLM's strategic reasoning with the physical precision of the gm/Id methodology. By empowering the LLM with gm/Id lookup tables, it becomes a quantitative, data-driven design partner. We validated this on a two-stage op-amp, where our framework enabled the Gemini model to meet all TT corner specs in 5 iterations and extended optimization to all PVT corners. A crucial ablation study proved gm/Id data is key for this efficiency and precision; without it, the LLM is slower and deviates. Compared to a senior engineer's design, our framework achieves quasi-expert quality with an order-of-magnitude improvement in efficiency. This work validates a path for true analog design automation by combining LLM reasoning with scientific circuit design methodologies.
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