用图神经网络高效预测射频电路性能,只需少量数据就能跨拓扑泛化。
RF-Informed Graph Neural Networks for Accurate and Data-Efficient Circuit Performance Prediction
- 基于射频电路语义的图结构建模,保留晶体管级连接与对称性。
- 平均相对误差仅2.71%,训练速度比之前快20倍,数据效率提升36倍。
- 适合射频芯片设计自动化,尤其适用于数据稀缺场景。
精确预测有源射频(RF)电路性能对现代无线系统至关重要,但因其高度非线性行为及传统仿真工具的高计算成本而面临挑战。现有机器学习代理模型通常需要大量数据以泛化到不同拓扑,或在未见电路上表现不佳。本文提出一种轻量、数据高效且拓扑感知的图神经网络(GNN)框架,用于预测低噪声放大器(LNAs)、混频器、压控振荡器(VCOs)、功率放大器(PAs)和电压放大器(VAs)等有源射频电路的关键性能指标。该框架采用射频集成电路领域知情的特征索引,通过低成本编码功能器件语义(如差分对、变容二极管晶体管)实现跨拓扑适应性和高效知识迁移。代理模型使用器件-端口图抽象表示电路,以保持细粒度连接关系和晶体管级对称性。最终模型通过并行训练推广至多种电路类别。实验结果表明,该模型能准确建模多模态和重尾的射频性能分布,在十九种拓扑上实现平均相对误差(MRE)2.71%,训练速度比先前方法快3.3倍和20倍,对未见拓扑的泛化能力提升约26.2倍。此外,相比最先进方法,训练数据效率提高约36倍,证明其在可扩展、可部署的射频设计自动化中的有效性。
原文摘要 · Abstract (English)
Accurately predicting the performance of active radio frequency (RF) circuits is essential for modern wireless systems but remains challenging due to highly nonlinear behavior and the high computational cost of traditional simulation tools. Existing machine learning (ML) surrogates often require large datasets to generalize across various topologies or are not accurate on held-out circuits. This work presents a lightweight, data-efficient, and topology-aware graph neural network (GNN) framework for predicting key performance metrics of active RF circuit classes, such as low-noise amplifiers (LNAs), mixers, voltage-controlled oscillators (VCOs), power amplifiers (PAs), and voltage amplifiers (VAs). The proposed framework employs RFIC domain-informed feature indexing to enable cross-topology adaptability by cheap encoding of functional device semantics (e.g., differential pair and varactor transistors) and efficient knowledge transfer. The surrogate model represents circuits using device-terminal graph abstractions to preserve fine-grained connectivity and transistor-level symmetry. The final model is generalized to a wide variety of classes by being trained in parallel. Experimental results demonstrate accurate modeling of multimodal and heavy-tailed RF performance distributions, achieving an average mean relative error (MRE) of 2.71% across nineteen topologies, an improvement of 3.3x and 20x faster in training over prior art, and the generalization to held-out topologies is improved by ~26.2x. Furthermore, this work shows ~36x training data efficiency compared to state-of-the-art, demonstrating its effectiveness for scalable and deployment-ready RF design automation.
Thank you to arXiv for use of its open access interoperability. PaperDance 不是 arXiv 官方产品;中文卡片由大模型生成,请以原文为准。