用大模型零训练识别模拟电路子模块，无需人工规则或标注数据。
GENIE-ASI: Generative Instruction and Executable Code for Analog Subcircuit Identification
- 基于上下文学习生成自然语言指令，再转为可执行代码
- 简单结构F1达1.0，复杂结构也表现可观（F1=0.31）
- 适合想尝试大模型做模拟电路自动化的研究者
模拟子电路识别是模拟设计中的核心任务，对仿真、尺寸优化和版图设计至关重要。传统方法常依赖大量人工经验、规则编码或大规模标注数据。为此，我们提出GENIE-ASI，首个无需训练的基于大语言模型（LLM）的模拟子电路识别方法。该方法分两阶段：首先通过上下文学习从少量示例中提取自然语言指令，再将其转化为可执行的Python代码，用于识别未见过的SPICE网表中的子电路。此外，为系统评估基于LLM的方法，我们构建了一个包含多种运算放大器网表的新基准。实验结果表明，GENIE-ASI在简单结构上达到与规则方法相当的性能（F1-score = 1.0），在中等抽象结构上保持竞争力（F1-score = 0.81），并在复杂子电路上展现出潜力（F1-score = 0.31）。这些结果证明大模型可作为模拟设计自动化中的通用灵活工具，为基础模型在该领域的应用开辟新方向。
原文摘要 · Abstract (English)
Analog subcircuit identification is a core task in analog design, essential for simulation, sizing, and layout. Traditional methods often require extensive human expertise, rule-based encoding, or large labeled datasets. To address these challenges, we propose GENIE-ASI, the first training-free, large language model (LLM)-based methodology for analog subcircuit identification. GENIE-ASI operates in two phases: it first uses in-context learning to derive natural language instructions from a few demonstration examples, then translates these into executable Python code to identify subcircuits in unseen SPICE netlists. In addition, to evaluate LLM-based approaches systematically, we introduce a new benchmark composed of operational amplifier netlists (op-amps) that cover a wide range of subcircuit variants. Experimental results on the proposed benchmark show that GENIE-ASI matches rule-based performance on simple structures (F1-score = 1.0), remains competitive on moderate abstractions (F1-score = 0.81), and shows potential even on complex subcircuits (F1-score = 0.31). These findings demonstrate that LLMs can serve as adaptable, general-purpose tools in analog design automation, opening new research directions for foundation model applications in analog design automation.
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