用AI生成可运行的电路数据，解决芯片设计缺数据难题
SynCircuit: Automated Generation of New Synthetic RTL Circuits Can Enable Big Data in Circuits
- 基于扩散模型生成有向无环图结构电路
- 生成电路逻辑冗余减少37%，真实度显著提升
- 适合做AI芯片设计的科研人员和工程师
近年来，人工智能辅助集成电路设计展现出巨大潜力，但公开可用的电路设计数据极为匮乏，成为制约该领域发展的主要瓶颈。本文首次提出SynCircuit框架，自动在HDL格式下生成具有有效功能的合成电路。该框架包含三个创新步骤：1）提出定制化的基于扩散的生成模型，解决尚未被充分研究的有向环图（DCG）生成任务；2）通过约束优化确保生成电路的有效性；3）采用蒙特卡洛树搜索（MCTS）进一步优化逻辑冗余。实验表明，SynCircuit生成的合成电路更接近真实电路，在下游电路设计任务中显著提升了机器学习模型性能。
原文摘要 · Abstract (English)
In recent years, AI-assisted IC design methods have demonstrated great potential, but the availability of circuit design data is extremely limited, especially in the public domain. The lack of circuit data has become the primary bottleneck in developing AI-assisted IC design methods. In this work, we make the first attempt, SynCircuit, to generate new synthetic circuits with valid functionalities in the HDL format. SynCircuit automatically generates synthetic data using a framework with three innovative steps: 1) We propose a customized diffusion-based generative model to resolve the Directed Cyclic Graph (DCG) generation task, which has not been well explored in the AI community. 2) To ensure our circuit is valid, we enforce the circuit constraints by refining the initial graph generation outputs. 3) The Monte Carlo tree search (MCTS) method further optimizes the logic redundancy in the generated graph. Experimental results demonstrate that our proposed SynCircuit can generate more realistic synthetic circuits and enhance ML model performance in downstream circuit design tasks.
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