低功耗神经网络乘法器，用近似计算省电30%还更准。
Low Power Approximate Multiplier Architecture for Deep Neural Networks
- 用4:2压缩器替代传统设计，仅引入一个组合误差。
- 在图像去噪中提升PSNR和SSIM，手写数字识别准确率高。
- 适合对能效敏感的边缘AI硬件部署。
本文提出一种面向深度神经网络（DNN）应用的低功耗近似乘法器架构。设计了一种4:2压缩器，仅引入单一组合误差，并集成至8×8无符号乘法器中，显著减少精确压缩器使用，同时保持低误差率。该乘法器被用于定制卷积层，在图像识别与去噪任务上进行评估。硬件测试显示，相比现有最优乘法器，本设计最高可节省30.24%能耗。在图像去噪任务中，定制近似卷积层实现更高的峰值信噪比（PSNR）与结构相似性指数（SSIM）。应用于手写数字识别时，模型仍保持高分类准确率。结果表明，该架构在能效与计算精度间取得良好平衡，适用于低功耗AI硬件实现。
原文摘要 · Abstract (English)
This paper proposes an low power approximate multiplier architecture for deep neural network (DNN) applications. A 4:2 compressor, introducing only a single combination error, is designed and integrated into an 8x8 unsigned multiplier. This integration significantly reduces the usage of exact compressors while preserving low error rates. The proposed multiplier is employed within a custom convolution layer and evaluated on neural network tasks, including image recognition and denoising. Hardware evaluation demonstrates that the proposed design achieves up to 30.24% energy savings compared to the best among existing multipliers. In image denoising, the custom approximate convolution layer achieves improved Peak Signal-to-Noise Ratio (PSNR) and Structural Similarity Index Measure (SSIM) compared to other approximate designs. Additionally, when applied to handwritten digit recognition, the model maintains high classification accuracy. These results demonstrate that the proposed architecture offers a favorable balance between energy efficiency and computational precision, making it suitable for low-power AI hardware implementations.
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