用轻量神经网络纠正存算一体电路的缺陷导致的推理错误
Application of Machine Learning for Correcting Defect-induced Neuromorphic Circuit Inference Errors
- 用轻量神经网络根据输出电压修正故障引起的推理误差
- 缺陷场景下推理准确率从55%提升至90%，恢复35%损失
- 可泛化到未训练过的缺陷类型，适合边缘和物联网应用
本文提出一种基于机器学习的方法，用于纠正全模拟忆阻器（ReRAM）类脑电路中因固定电平故障导致的推理误差。通过设计-技术协同优化（DTCO）仿真框架，我们建模并分析了多层阵列架构中的六种空间缺陷类型：圆形、互补圆形、环形、行、列和棋盘型。实验表明，所提方法利用仅基于电路输出电压训练的轻量神经网络，可在缺陷场景下将推理准确率从55%提升至90%，恢复35%的准确率损失。基于手写数字识别任务的结果显示，即使网络极小，也能显著提升电路鲁棒性。该方法为边缘与物联网应用中的类脑系统提供了可扩展、低功耗的高良率与高可靠性路径。此外，该方法不仅可纠正训练中出现的缺陷类型，还能泛化到未见过的缺陷类型，实现合理准确率。框架还可拓展支持实时自适应学习，实现对动态或老化引发故障的片上在线修正。
原文摘要 · Abstract (English)
This paper presents a machine learning-based approach to correct inference errors caused by stuck-at faults in fully analog ReRAM-based neuromorphic circuits. Using a Design-Technology Co-Optimization (DTCO) simulation framework, we model and analyze six spatial defect types-circular, circular-complement, ring, row, column, and checkerboard-across multiple layers of a multi-array neuromorphic architecture. We demonstrate that the proposed correction method, which employs a lightweight neural network trained on the circuit's output voltages, can recover up to 35% (from 55% to 90%) inference accuracy loss in defective scenarios. Our results, based on handwritten digit recognition tasks, show that even small corrective networks can significantly improve circuit robustness. This method offers a scalable and energy-efficient path toward enhanced yield and reliability for neuromorphic systems in edge and internet-of-things (IoTs) applications. In addition to correcting the specific defect types used during training, our method also demonstrates the ability to generalize-achieving reasonable accuracy when tested on different types of defects not seen during training. The framework can be readily extended to support real-time adaptive learning, enabling on-chip correction for dynamic or aging-induced fault profiles.
Thank you to arXiv for use of its open access interoperability. PaperDance 不是 arXiv 官方产品；中文卡片由大模型生成，请以原文为准。