通过温度预测优化指令缓存,提升移动CPU性能
A TRRIP Down Memory Lane: Temperature-Based Re-Reference Interval Prediction For Instruction Caching
- 基于代码热度(热/冷)分析,动态调整缓存替换策略
- 在优化代码上使指令L2 MPKI降低26.5%,平均提速3.9%
- 软硬协同设计,适合实际移动系统部署
现代移动CPU软件因运行时行为复杂,导致相同指令在不同执行间的重用距离增大,传统指令缓存替换策略面临挑战。移动代码常因前端停顿导致后续资源饥饿,而应用复杂度与代码规模增长速度远超可用片上内存,受功耗与面积限制,传统硬件主导的缓存管理方法已显不足。本文提出一种新型软硬协同设计TRRIP(Temperature-based Re-Reference Interval Prediction),让编译器基于代码页属性分析并分类代码热度,通过标准操作系统接口向硬件提供热度信息。轻量级硬件扩展利用该信息优化指令缓存替换策略,减少热代码的淘汰率。TRRIP具备实际部署可行性,已在已使用PGO优化的移动代码上实现指令L2 MPKI降低26.5%,几何均值速度提升3.9%。
原文摘要 · Abstract (English)
Modern mobile CPU software pose challenges for conventional instruction cache replacement policies due to their complex runtime behavior causing high reuse distance between executions of the same instruction. Mobile code commonly suffers from large amounts of stalls in the CPU frontend and thus starvation of the rest of the CPU resources. Complexity of these applications and their code footprint are projected to grow at a rate faster than available on-chip memory due to power and area constraints, making conventional hardware-centric methods for managing instruction caches to be inadequate. We present a novel software-hardware co-design approach called TRRIP (Temperature-based Re-Reference Interval Prediction) that enables the compiler to analyze, classify, and transform code based on "temperature" (hot/cold), and to provide the hardware with a summary of code temperature information through a well-defined OS interface based on using code page attributes. TRRIP's lightweight hardware extension employs code temperature attributes to optimize the instruction cache replacement policy resulting in the eviction rate reduction of hot code. TRRIP is designed to be practical and adoptable in real mobile systems that have strict feature requirements on both the software and hardware components. TRRIP can reduce the L2 MPKI for instructions by 26.5% resulting in geomean speedup of 3.9%, on top of RRIP cache replacement running mobile code already optimized using PGO.
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