用混合单双数设计实现无乘法器的柔性电子机器学习分类器
Hybrid unary-binary design for multiplier-less printed Machine Learning classifiers
- 提出混合单双数架构,省去昂贵编码器
- 六组数据集测试显示面积降46%、功耗降39%
- 适合低功耗柔性电子设备的定制化模型部署
印刷电子(PE)为机器学习电路提供了一种灵活且成本低廉的硅替代方案,但其较大的特征尺寸限制了分类器的复杂度。利用PE低成本的制造和非重复性工程费用,设计者可针对特定机器学习模型定制硬件,从而简化电路设计。本文探索了替代算术方案,提出一种混合单双数架构,可去除高成本编码器,并实现高效无乘法器的多层感知机(MLP)分类器执行。我们还引入面向架构的训练方法,进一步提升面积与功耗效率。在六个数据集上的评估表明,平均面积减少46%,功耗降低39%,且精度损失极小,优于其他先进MLP设计。
原文摘要 · Abstract (English)
Printed Electronics (PE) provide a flexible, cost-efficient alternative to silicon for implementing machine learning (ML) circuits, but their large feature sizes limit classifier complexity. Leveraging PE's low fabrication and NRE costs, designers can tailor hardware to specific ML models, simplifying circuit design. This work explores alternative arithmetic and proposes a hybrid unary-binary architecture that removes costly encoders and enables efficient, multiplier-less execution of MLP classifiers. We also introduce architecture-aware training to further improve area and power efficiency. Evaluation on six datasets shows average reductions of 46% in area and 39% in power, with minimal accuracy loss, surpassing other state-of-the-art MLP designs.
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