用位交织打包加速加密联邦学习，通信量降60.7%且提速100倍。
FedBit: Accelerating Privacy-Preserving Federated Learning via Bit-Interleaved Packing and Cross-Layer Co-Design
- 将多个模型参数打包进单个密文系数，减少膨胀
- 在BFV方案下实现加密速度提升100倍，通信开销降低60.7%
- 软硬件协同设计，适合高隐私要求的边缘联邦场景
联邦学习（FL）结合全同态加密（FHE）可在模型聚合过程中有效保护数据隐私，通过加密本地模型更新再传输，防范不可信服务器或传输窃听。然而，同态加密带来的计算负担和密文膨胀会显著增加资源与通信开销。为此，我们提出FedBit，一个针对Brakerski-Fan-Vercauteren（BFV）方案优化的软硬件协同框架。FedBit采用位交织数据打包技术，将多个模型参数嵌入单个密文系数中，从而最小化密文膨胀并最大化计算并行性。同时，集成专用FPGA加速器处理加密运算，并设计优化数据流以降低内存开销。实验表明，FedBit在加密阶段实现两个数量级的速度提升，平均通信开销降低60.7%，且保持高精度。
原文摘要 · Abstract (English)
Federated learning (FL) with fully homomorphic encryption (FHE) effectively safeguards data privacy during model aggregation by encrypting local model updates before transmission, mitigating threats from untrusted servers or eavesdroppers in transmission. However, the computational burden and ciphertext expansion associated with homomorphic encryption can significantly increase resource and communication overhead. To address these challenges, we propose FedBit, a hardware/software co-designed framework optimized for the Brakerski-Fan-Vercauteren (BFV) scheme. FedBit employs bit-interleaved data packing to embed multiple model parameters into a single ciphertext coefficient, thereby minimizing ciphertext expansion and maximizing computational parallelism. Additionally, we integrate a dedicated FPGA accelerator to handle cryptographic operations and an optimized dataflow to reduce the memory overhead. Experimental results demonstrate that FedBit achieves a speedup of two orders of magnitude in encryption and lowers average communication overhead by 60.7%, while maintaining high accuracy.
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