CIMNAS联合优化神经网络架构、量化与硬件，显著提升存内计算效率。
CIMNAS: A Joint Framework for Compute-In-Memory-Aware Neural Architecture Search
- 联合搜索软件、量化与硬件参数，实现软硬协同优化。
- 在ImageNet上降低EDAP达90.1到104.5倍，能效提升4.68到4.82倍。
- 无需牺牲精度，适合高能效存内计算芯片设计者使用。
为在人工智能应用中最大化基于存内计算（CIM）的神经网络加速器的硬件效率与性能准确率，协同优化软硬件设计参数至关重要。手动调优因参数众多且相互依赖而不可行。本文提出CIMNAS，一种面向CIM架构的联合模型-量化-硬件优化框架。该框架同时搜索软件参数、量化策略及广泛硬件参数，涵盖器件、电路与架构级协同优化。基于移动网络（MobileNet）和基于RRAM的CIM架构，在包含9.9×10^85种组合的搜索空间内实验，于ImageNet数据集上实现能量-延迟-面积积（EDAP）降低90.1至104.5倍，每瓦特算力（TOPS/W）提升4.68至4.82倍，每平方毫米算力（TOPS/mm²）提升11.3至12.78倍，同时保持73.81%的准确率。该框架扩展至基于SRAM的ResNet50架构后，EDAP最高降低819.5倍。相较于现有方法，CIMNAS在不损失精度前提下实现EDAP优化，生成多样化的高性能软硬件组合。代码已开源。
原文摘要 · Abstract (English)
To maximize hardware efficiency and performance accuracy in Compute-In-Memory (CIM)-based neural network accelerators for Artificial Intelligence (AI) applications, co-optimizing both software and hardware design parameters is essential. Manual tuning is impractical due to the vast number of parameters and their complex interdependencies. To effectively automate the design and optimization of CIM-based neural network accelerators, hardware-aware neural architecture search (HW-NAS) techniques can be applied. This work introduces CIMNAS, a joint model-quantization-hardware optimization framework for CIM architectures. CIMNAS simultaneously searches across software parameters, quantization policies, and a broad range of hardware parameters, incorporating device-, circuit-, and architecture-level co-optimizations. CIMNAS experiments were conducted over a search space of 9.9x10^85 potential parameter combinations with the MobileNet model as a baseline and RRAM-based CIM architecture. Evaluated on the ImageNet dataset, CIMNAS achieved a reduction in energy-delay-area product (EDAP) ranging from 90.1x to 104.5x, an improvement in TOPS/W between 4.68x and 4.82x, and an enhancement in TOPS/mm^2 from 11.3x to 12.78x relative to various baselines, all while maintaining an accuracy of 73.81%. The adaptability and robustness of CIMNAS are demonstrated by extending the framework to support the SRAM-based ResNet50 architecture, achieving up to an 819.5x reduction in EDAP. Unlike other state-of-the-art methods, CIMNAS achieves EDAP-focused optimization without any accuracy loss, generating diverse software-hardware parameter combinations for high-performance CIM-based neural network designs. The source code of CIMNAS is available at https://github.com/OlgaKrestinskaya/CIMNAS.
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