为自动驾驶系统设计低延迟共享内存传输,显著提升数据处理速度与响应能力。
A Faster and More Reliable Middleware for Autonomous Driving Systems
- 采用内存内传感器数据直传,避免序列化开销,用无锁双缓冲保数据新鲜度。
- 在Jetson Orin上将传输延迟降低98%,感知到决策平均时延从522毫秒降至290毫秒。
- 适合对实时性要求高的自动驾驶场景,尤其适用于高阶智能驾驶系统部署。
高速自动驾驶车辆的安全性依赖于快速控制回路和从感知到执行的严格延迟约束。许多开源自动驾驶系统使用ROS 2中间件;当多个传感器与控制节点共享同一计算单元时,ROS 2及其DDS传输层引入显著的(反)序列化、拷贝与发现开销,压缩了可用时间预算。本文提出传感器内存内传输(Sensor-in-Memory, SIM),一种面向自动驾驶车载内部流水线的共享内存传输方案。SIM保持传感器数据原生内存布局(如cv::Mat、PCL),采用无锁有界双缓冲机制,以新数据覆盖旧数据优先保障时效性,并仅需四行代码即可集成至ROS 2节点。与传统中间件不同,SIM在ROS 2旁运行,专为数据新鲜度和极低延迟优先、容忍不完全交付的应用优化。SIM提供序列号、写入心跳和可选校验和,确保数据有序性、活跃性和基本完整性。在NVIDIA Jetson Orin Nano上,相比FastRTPS和Zenoh等零拷贝传输,SIM将数据传输延迟最高降低98%,均值降低约95%,95分位/99分位尾部延迟缩小约96%。在搭载Autoware.Universe的量产级L4级车辆测试中,SIM将定位频率从7.5 Hz提升至9.5 Hz。全链路关键模块应用后,感知到决策平均延迟由521.91毫秒降至290.26毫秒,在干混凝土路面40 mph(64 km/h)下紧急制动距离减少13.6英尺(4.14米)。
原文摘要 · Abstract (English)
Ensuring safety in high-speed autonomous vehicles requires rapid control loops and tightly bounded delays from perception to actuation. Many open-source autonomy systems rely on ROS 2 middleware; when multiple sensor and control nodes share one compute unit, ROS 2 and its DDS transports add significant (de)serialization, copying, and discovery overheads, shrinking the available time budget. We present Sensor-in-Memory (SIM), a shared-memory transport designed for intra-host pipelines in autonomous vehicles. SIM keeps sensor data in native memory layouts (e.g., cv::Mat, PCL), uses lock-free bounded double buffers that overwrite old data to prioritize freshness, and integrates into ROS 2 nodes with four lines of code. Unlike traditional middleware, SIM operates beside ROS 2 and is optimized for applications where data freshness and minimal latency outweigh guaranteed completeness. SIM provides sequence numbers, a writer heartbeat, and optional checksums to ensure ordering, liveness, and basic integrity. On an NVIDIA Jetson Orin Nano, SIM reduces data-transport latency by up to 98% compared to ROS 2 zero-copy transports such as FastRTPS and Zenoh, lowers mean latency by about 95%, and narrows 95th/99th-percentile tail latencies by around 96%. In tests on a production-ready Level 4 vehicle running Autoware.Universe, SIM increased localization frequency from 7.5 Hz to 9.5 Hz. Applied across all latency-critical modules, SIM cut average perception-to-decision latency from 521.91 ms to 290.26 ms, reducing emergency braking distance at 40 mph (64 km/h) on dry concrete by 13.6 ft (4.14 m).
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