为柔性可穿戴设备定制低功耗协处理器，提升健康监测实时性。
Bespoke Co-processor for Energy-Efficient Health Monitoring on RISC-V-based Flexible Wearables
- 针对柔性RISC-V芯片设计专用乘加协处理器，固定系数优化能效
- 实测在多个医疗数据集上近实时运行，功耗低于柔性电池预算
- 适合追求低功耗、高集成度的可穿戴健康设备开发者
柔性电子器件为可贴合、轻量化、可丢弃的医疗可穿戴设备提供独特优势。然而，其门电路数量有限、特征尺寸大且静态功耗高，导致体表机器学习分类极具挑战。现有可弯曲RISC-V系统虽体积紧凑，但能效不足。本文提出一种机械柔性的RISC-V处理器，集成专用于固定系数的乘加协处理器，以最大化能效并最小化延迟。方法通过构建约束编程问题，联合优化协处理器常数与多层感知机（MLP）推理操作的最优映射，利用柔性技术低成本、低非重复工程成本特性实现紧凑、模型专用的硬件。后布局结果表明，在多个医疗数据集上实现近实时性能，电路功耗符合现有柔性电池供电范围，面积仅2.42 mm²，为可及、可持续、可贴合的医疗可穿戴设备提供可行路径。相比业界最佳方案，微处理器平均提速2.35倍，能耗降低2.15倍。
原文摘要 · Abstract (English)
Flexible electronics offer unique advantages for conformable, lightweight, and disposable healthcare wearables. However, their limited gate count, large feature sizes, and high static power consumption make on-body machine learning classification highly challenging. While existing bendable RISC-V systems provide compact solutions, they lack the energy efficiency required. We present a mechanically flexible RISC-V that integrates a bespoke multiply-accumulate co-processor with fixed coefficients to maximize energy efficiency and minimize latency. Our approach formulates a constrained programming problem to jointly determine co-processor constants and optimally map Multi-Layer Perceptron (MLP) inference operations, enabling compact, model-specific hardware by leveraging the low fabrication and non-recurring engineering costs of flexible technologies. Post-layout results demonstrate near-real-time performance across several healthcare datasets, with our circuits operating within the power budget of existing flexible batteries and occupying only 2.42 mm^2, offering a promising path toward accessible, sustainable, and conformable healthcare wearables. Our microprocessors achieve an average 2.35x speedup and 2.15x lower energy consumption compared to the state of the art.
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