arXiv:2511.12136cs.CV2025-11

优化脉冲神经网络在低资源设备上的推理速度与内存占用。

Compression and Inference of Spiking Neural Networks on Resource-Constrained Hardware

  • 用C语言实现轻量级运行时,避免解释器开销。
  • 通过稀疏性剪枝减少计算量,实测提速10倍以上。
  • 适合嵌入式系统部署,支持微控制器运行。

脉冲神经网络(SNNs)以离散时间脉冲通信,具备事件驱动特性,在资源受限硬件上具有时序处理和能效优势,但训练与部署仍具挑战。本文提出基于C语言的轻量级运行时,用于边缘设备的SNN推理,并通过优化降低延迟与内存开销而不牺牲精度。从SNNTorch导出的训练模型被转换为紧凑的C代码表示;采用静态、缓存友好的数据布局和预分配机制,消除解释器与内存分配开销。进一步利用脉冲活动的稀疏性,剪枝无效神经元与突触,显著压缩上游卷积层的计算量。在N-MNIST与ST-MNIST数据集上的实验表明,其性能与Python基线相当,桌面CPU上实现约10倍加速,剪枝后进一步提升,内存大幅缩减,可成功部署于微控制器(Arduino Portenta H7)。结果表明,结合优化运行时与脉冲驱动的模型压缩,SNN可在常规嵌入式平台高效运行。

原文摘要 · Abstract (English)

Spiking neural networks (SNNs) communicate via discrete spikes in time rather than continuous activations. Their event-driven nature offers advantages for temporal processing and energy efficiency on resource-constrained hardware, but training and deployment remain challenging. We present a lightweight C-based runtime for SNN inference on edge devices and optimizations that reduce latency and memory without sacrificing accuracy. Trained models exported from SNNTorch are translated to a compact C representation; static, cache-friendly data layouts and preallocation avoid interpreter and allocation overheads. We further exploit sparse spiking activity to prune inactive neurons and synapses, shrinking computation in upstream convolutional layers. Experiments on N-MNIST and ST-MNIST show functional parity with the Python baseline while achieving ~10 speedups on desktop CPU and additional gains with pruning, together with large memory reductions that enable microcontroller deployment (Arduino Portenta H7). Results indicate that SNNs can be executed efficiently on conventional embedded platforms when paired with an optimized runtime and spike-driven model compression. Code: https://github.com/karol-jurzec/snn-generator/

脉冲神经网络嵌入式部署模型压缩低功耗

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