用提示工程提升大模型生成RTL设计文档的准确性
Assessing Large Language Models in Generating RTL Design Specifications
- 测试不同提示策略对生成规格说明书的影响
- 提出可信赖的评估指标，验证生成结果质量
- 对比开源与商用大模型，助力芯片设计自动化
随着集成电路设计日益复杂，自动化理解与文档化RTL代码变得愈发重要。当前工程师需手动解析现有RTL代码并撰写规格说明，过程缓慢且易出错。尽管已有研究探索使用大语言模型从规格生成RTL，但自动化生成规格仍研究不足，主要因缺乏可靠的评估方法。为此，本文研究提示策略对RTL到规格生成质量的影响，提出忠实评估生成规格的指标，并对开源与商用大模型进行基准测试，为集成电路设计中更自动化、高效的规格生成流程提供基础。
原文摘要 · Abstract (English)
As IC design grows more complex, automating comprehension and documentation of RTL code has become increasingly important. Engineers currently should manually interpret existing RTL code and write specifications, a slow and error-prone process. Although LLMs have been studied for generating RTL from specifications, automated specification generation remains underexplored, largely due to the lack of reliable evaluation methods. To address this gap, we investigate how prompting strategies affect RTL-to-specification quality and introduce metrics for faithfully evaluating generated specs. We also benchmark open-source and commercial LLMs, providing a foundation for more automated and efficient specification workflows in IC design.
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