用物理结构先验提升模拟电路优化效率，小样本下性能远超传统方法
Exploiting Function-Family Structure in Analog Circuit Optimization
- 基于器件物理规律构建结构化先验模型，替代通用高斯过程
- 在50-100次评估下，预测精度达R²≈0.99，显著优于传统GP方法
- 适合电路设计、自动化优化领域研究者快速提升调优效率
模拟电路优化通常被视为对任意平滑函数的黑箱搜索，但器件物理限制了性能映射到特定结构族：指数型器件定律、有理传递函数及分段动态。现成的高斯过程代理模型采用全局光滑、平稳先验，与这些分段切换的物理规律不匹配，在真实样本量（50–100次评估）下严重拟合偏差。本文提出电路先验网络（CPN），结合表格式基础模型TabPFN v2与直接期望改进（DEI），在离散后验下精确计算期望改进，而非依赖高斯近似。在6个电路和25个基线对比中，结构匹配的先验在小样本下使预测精度达到R²≈0.99（GP-Matérn在带隙电路仅得R²=0.16），性能指标提升1.05–3.81倍，迭代次数减少3.34–11.89倍，提示应从手工构造模型转向系统性识别物理结构。代码将在论文接收后公开。
原文摘要 · Abstract (English)
Analog circuit optimization is typically framed as black-box search over arbitrary smooth functions, yet device physics constrains performance mappings to structured families: exponential device laws, rational transfer functions, and regime-dependent dynamics. Off-the-shelf Gaussian-process surrogates impose globally smooth, stationary priors that are misaligned with these regime-switching primitives and can severely misfit highly nonlinear circuits at realistic sample sizes (50--100 evaluations). We demonstrate that pre-trained tabular models encoding these primitives enable reliable optimization without per-circuit engineering. Circuit Prior Network (CPN) combines a tabular foundation model (TabPFN v2) with Direct Expected Improvement (DEI), computing expected improvement exactly under discrete posteriors rather than Gaussian approximations. Across 6 circuits and 25 baselines, structure-matched priors achieve $R^2 \approx 0.99$ in small-sample regimes where GP-Matérn attains only $R^2 = 0.16$ on Bandgap, deliver $1.05$--$3.81\times$ higher FoM with $3.34$--$11.89\times$ fewer iterations, and suggest a shift from hand-crafting models as priors toward systematic physics-informed structure identification. Our code will be made publicly available upon paper acceptance.
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