用LLM做可逆编码解码，减少硬件设计中的幻觉和遗漏。
Mitigating hallucinations and omissions in LLMs for invertible problems: An application to hardware logic design automation
- 将LLM作为双向可逆转换器，输入逻辑表生成代码并还原。
- 自动生成13单元2D片上网络路由器的完整HDL代码（1500-2000行）。
- 可检测生成错误，辅助发现设计规范缺陷，适合芯片设计开发者。
针对从源域（如逻辑条件表LCT）到目标域（如硬件描述语言HDL）的可逆问题，我们提出一种方法：利用大语言模型（LLM）作为无损编码器将源数据转为目标数据，再作为无损解码器还原回源数据，类比信息论中的无损压缩。具体地，以LCT为输入，使用七种不同LLM生成一个二维片上网络路由器（13个单元，1500-2000行代码）的完整HDL代码，再从自动生成的HDL重构出原始LCT，并对比原图与重构图。该方法显著提升生产力，不仅能确认正确生成的逻辑，还能识别错误生成的逻辑，同时帮助开发者发现设计规范中的错误。
原文摘要 · Abstract (English)
We show for invertible problems that transform data from a source domain (for example, Logic Condition Tables (LCTs)) to a destination domain (for example, Hardware Description Language (HDL) code), an approach of using Large Language Models (LLMs) as a lossless encoder from source to destination followed by as a lossless decoder back to the source, comparable to lossless compression in information theory, can mitigate most of the LLM drawbacks of hallucinations and omissions. Specifically, using LCTs as inputs, we generate the full HDL for a two-dimensional network-on-chip router (13 units, 1500-2000 lines of code) using seven different LLMs, reconstruct the LCTs from the auto-generated HDL, and compare the original and reconstructed LCTs. This approach yields significant productivity improvements, not only confirming correctly generated LLM logic and detecting incorrectly generated LLM logic but also assisting developers in finding design specification errors.
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