让大模型忘记敏感代码，提升硬件生成可靠性。
When Forgetting Builds Reliability: LLM Unlearning for Reliable Hardware Code Generation
- 采用保持语法结构的遗忘策略，安全移除有害知识。
- 支持最大3倍规模遗忘集，单轮训练即可完成。
- 适合需要保护知识产权的芯片设计团队使用。
大型语言模型（LLMs）在自动化硬件代码生成方面展现出巨大潜力，但其可靠性面临挑战：训练数据包含大量异构信息，导致模型记忆了专有知识产权（IP）、污染的基准数据和不安全编码模式。为缓解此类风险，我们提出一种面向硬件代码生成的新型遗忘框架。该方法结合（i）保持语法结构的遗忘策略，确保遗忘过程中硬件代码结构完整；（ii）细粒度地板感知的选择性损失机制，实现对问题知识的精准高效清除。实验表明，该框架可支持最大达3倍规模的遗忘集，通常仅需单个训练轮次，同时保持寄存器传输级（RTL）代码的语法正确性和功能完整性。本工作为可靠的大模型辅助硬件设计开辟了新路径。
原文摘要 · Abstract (English)
Large Language Models (LLMs) have shown strong potential in accelerating digital hardware design through automated code generation. Yet, ensuring their reliability remains a critical challenge, as existing LLMs trained on massive heterogeneous datasets often exhibit problematic memorization of proprietary intellectual property (IP), contaminated benchmarks, and unsafe coding patterns. To mitigate these risks, we propose a novel unlearning framework tailored for LLM-based hardware code generation. Our method combines (i) a syntax-preserving unlearning strategy that safeguards the structural integrity of hardware code during forgetting, and (ii) a fine-grained floor-aware selective loss that enables precise and efficient removal of problematic knowledge. This integration achieves effective unlearning without degrading LLM code generation capabilities. Extensive experiments show that our framework supports forget sets up to 3x larger, typically requiring only a single training epoch, while preserving both syntactic correctness and functional integrity of register-transfer level (RTL) codes. Our work paves an avenue towards reliable LLM-assisted hardware design.
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