用AI自动生成模拟电路输入输出模块,实测可大幅缩短设计时间并直接流片成功。
AMS-IO-Bench and AMS-IO-Agent: Benchmarking and Structured Reasoning for Analog and Mixed-Signal Integrated Circuit Input/Output Design
- 基于大模型构建专用代理,将自然语言需求转为可执行的设计逻辑
- 在28nm工艺中实现70%以上良率,设计时间从小时级降至分钟级
- 首个让AI完成可直接流片的模拟电路子系统设计的案例
本文提出AMS-IO-Agent,一种面向模拟与混合信号集成电路输入输出子系统生成的领域专用大模型代理。该框架首次实现自然语言设计意图与工业级设计交付物之间的精准衔接。AMS-IO-Agent融合两项核心能力:(1) 结构化领域知识库,封装可复用的设计约束与规范;(2) 设计意图结构化,通过JSON与Python作为中间格式,将模糊用户指令转化为可验证的逻辑步骤。我们进一步构建了针对wirebond封装的AMS I/O ring自动化基准测试平台AMS-IO-Bench。在该平台上,AMS-IO-Agent实现超过70%的DRC+LVS通过率,设计周期从数小时缩短至数分钟,显著优于基线大模型。更关键的是,该代理生成的I/O环已成功在28 nm CMOS流片验证,证明其在真实设计流程中的可行性。据我们所知,这是首个由大模型代理完成非平凡子任务且输出直接用于硅片制造的人机协同模拟电路设计案例。
原文摘要 · Abstract (English)
In this paper, we propose AMS-IO-Agent, a domain-specialized LLM-based agent for structure-aware input/output (I/O) subsystem generation in analog and mixed-signal (AMS) integrated circuits (ICs). The central contribution of this work is a framework that connects natural language design intent with industrial-level AMS IC design deliverables. AMS-IO-Agent integrates two key capabilities: (1) a structured domain knowledge base that captures reusable constraints and design conventions; (2) design intent structuring, which converts ambiguous user intent into verifiable logic steps using JSON and Python as intermediate formats. We further introduce AMS-IO-Bench, a benchmark for wirebond-packaged AMS I/O ring automation. On this benchmark, AMS-IO-Agent achieves over 70\% DRC+LVS pass rate and reduces design turnaround time from hours to minutes, outperforming the baseline LLM. Furthermore, an agent-generated I/O ring was fabricated and validated in a 28 nm CMOS tape-out, demonstrating the practical effectiveness of the approach in real AMS IC design flows. To our knowledge, this is the first reported human-agent collaborative AMS IC design in which an LLM-based agent completes a nontrivial subtask with outputs directly used in silicon.
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