用FPGA加速点云模型，4倍降复杂度仅损失2%精度
HLS4PC: A Parametrizable Framework For Accelerating Point-Based 3D Point Cloud Models on FPGA
- 基于FPGA的可配置框架，融合算法优化与硬件压缩
- 点云模型复杂度降4倍，精度仅下降2%（ModelNet40）
- 相比GPU提升3.56倍吞吐量，适合实时安全场景
基于点的3D点云模型依赖计算和内存密集型映射函数与神经网络层进行分类/分割，通常在服务器级GPU上运行。由于3D点云数据稀疏且无结构，导致高内存和计算需求，造成GPU利用率低，难以满足安全关键应用的实时性要求。为此，我们提出HLS4PC，一种用于FPGA加速的可参数化高层次综合框架。该方法利用FPGA并行性与算法优化，实现映射函数与神经网络函数的高效定点实现。我们在PointMLP-Elite模型上探索多种硬件感知压缩技术，包括以URS替代FPS、参数量化、层融合及输入点剪枝，得到复杂度降低4倍的PointMLP-Lite模型，仅在ModelNet40上损失2%精度。其次，该模型在FPGA上的加速使吞吐量比此前工作提升3.56倍；相比GPU和CPU实现，分别提升2.3倍和22倍。
原文摘要 · Abstract (English)
Point-based 3D point cloud models employ computation and memory intensive mapping functions alongside NN layers for classification/segmentation, and are executed on server-grade GPUs. The sparse, and unstructured nature of 3D point cloud data leads to high memory and computational demand, hindering real-time performance in safety critical applications due to GPU under-utilization. To address this challenge, we present HLS4PC, a parameterizable HLS framework for FPGA acceleration. Our approach leverages FPGA parallelization and algorithmic optimizations to enable efficient fixed-point implementations of both mapping and NN functions. We explore several hardware-aware compression techniques on a state-of-the-art PointMLP-Elite model, including replacing FPS with URS, parameter quantization, layer fusion, and input-points pruning, yielding PointMLP-Lite, a 4x less complex variant with only 2% accuracy drop on ModelNet40. Secondly, we demonstrate that the FPGA acceleration of the PointMLP-Lite results in 3.56x higher throughput than previous works. Furthermore, our implementation achieves 2.3x and 22x higher throughput compared to the GPU and CPU implementations, respectively.
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