为LLM生成的硬件代码优化质量提供新评测基准
A New Benchmark for the Appropriate Evaluation of RTL Code Optimization
- 构建36个手写数字电路，覆盖多种设计类型
- 对比低效与人工优化代码，量化功率性能面积提升
- 支持自动化评估，适合硬件生成模型研究者
人工智能快速发展依赖高效集成电路设计。现有研究尝试用大语言模型（LLMs）生成寄存器传输级（RTL）代码，但现有基准主要评估语法正确性，缺乏对功耗、性能、面积（PPA）优化质量的衡量。本文提出RTL-OPT基准，用于评估LLMs在RTL优化方面的能力。该基准包含36个手工设计的数字电路，涵盖组合逻辑、流水线数据通路、有限状态机和存储接口等多种实现类别。每项任务提供一对RTL代码：一个次优版本和一个人工优化的参考版本，反映行业公认的优化模式，这些模式未被传统综合工具捕捉。此外，RTL-OPT集成自动化评估框架，可验证功能正确性并量化PPA改进，实现生成模型在硬件设计优化方面的标准化、有意义评估。
原文摘要 · Abstract (English)
The rapid progress of artificial intelligence increasingly relies on efficient integrated circuit (IC) design. Recent studies have explored the use of large language models (LLMs) for generating Register Transfer Level (RTL) code, but existing benchmarks mainly evaluate syntactic correctness rather than optimization quality in terms of power, performance, and area (PPA). This work introduces RTL-OPT, a benchmark for assessing the capability of LLMs in RTL optimization. RTL-OPT contains 36 handcrafted digital designs that cover diverse implementation categories including combinational logic, pipelined datapaths, finite state machines, and memory interfaces. Each task provides a pair of RTL codes, a suboptimal version and a human-optimized reference that reflects industry-proven optimization patterns not captured by conventional synthesis tools. Furthermore, RTL-OPT integrates an automated evaluation framework to verify functional correctness and quantify PPA improvements, enabling standardized and meaningful assessment of generative models for hardware design optimization.
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