用可微逻辑电路实现低功耗灰度图像压缩，兼顾高效与硬件友好。
GIC-DLC: Differentiable Logic Circuits for Hardware-Friendly Grayscale Image Compression
- 用可微查找表模拟逻辑门，结合神经网络灵活性与布尔运算效率。
- 在灰度数据集上压缩率优于传统编码器，能耗和延迟显著降低。
- 适合部署在手机、相机等边缘设备的低功耗图像压缩场景。
神经图像编解码器相比PNG或JPEG-XL等传统手写方法能实现更高的压缩比，但通常带来显著计算开销，限制其在智能手机、摄像头和无人机等能效受限设备上的部署。本文提出灰度图像压缩的可微逻辑电路（GIC-DLC），通过训练查找表将神经网络的灵活性与布尔运算的高效性相结合。在灰度基准数据集上的实验表明，GIC-DLC在压缩效率上优于传统编码器，同时大幅降低能耗与延迟。结果证明，学习型压缩可实现硬件友好，为边缘设备上的低功耗图像压缩提供了有前景的方向。
原文摘要 · Abstract (English)
Neural image codecs achieve higher compression ratios than traditional hand-crafted methods such as PNG or JPEG-XL, but often incur substantial computational overhead, limiting their deployment on energy-constrained devices such as smartphones, cameras, and drones. We propose Grayscale Image Compression with Differentiable Logic Circuits (GIC-DLC), a hardware-aware codec where we train lookup tables to combine the flexibility of neural networks with the efficiency of Boolean operations. Experiments on grayscale benchmark datasets show that GIC-DLC outperforms traditional codecs in compression efficiency while allowing substantial reductions in energy consumption and latency. These results demonstrate that learned compression can be hardware-friendly, offering a promising direction for low-power image compression on edge devices.
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