用可变性提升性能，实现加速模拟退火的开源框架
GPU-accelerated simulated annealing based on p-bits with real-world device-variability modeling
- 基于p-bit构建GPU加速模拟退火框架，建模时序/强度/偏置等真实器件变异
- 在800至2万节点的MAX-CUT问题上，比CPU快两个数量级
- 适合做概率计算与优化算法研究，尤其关注硬件实际特性的团队
基于概率比特（p-bits）的概率计算为复杂问题求解（如模拟退火和机器学习）提供了高效替代方案。利用磁隧道结（MTJs）等新型器件实现p-bits会引入器件变异，传统预期其降低计算性能。然而本研究发现，器件变异不仅可能损害性能，还能通过利用时序变异提升算法表现。本文提出一个基于p-bits的、支持真实器件变异建模（包括时序、强度和偏置）的开源GPU加速模拟退火框架。通过CUDA仿真，该方法在800至20,000节点的MAX-CUT基准测试中，相较CPU实现两个数量级的速度提升。该框架提供可扩展、易访问的工具，旨在推动概率计算研究，助力各领域优化应用的发展。
原文摘要 · Abstract (English)
Probabilistic computing using probabilistic bits (p-bits) presents an efficient alternative to traditional CMOS logic for complex problem-solving, including simulated annealing and machine learning. Realizing p-bits with emerging devices such as magnetic tunnel junctions (MTJs) introduces device variability, which was expected to negatively impact computational performance. However, this study reveals an unexpected finding: device variability can not only degrade but also enhance algorithm performance, particularly by leveraging timing variability. This paper introduces a GPU-accelerated, open-source simulated annealing framework based on p-bits that models key device variability factors -- timing, intensity, and offset -- to reflect real-world device behavior. Through CUDA-based simulations, our approach achieves a two-order magnitude speedup over CPU implementations on the MAX-CUT benchmark with problem sizes ranging from 800 to 20,000 nodes. By providing a scalable and accessible tool, this framework aims to advance research in probabilistic computing, enabling optimization applications in diverse fields.
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